Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387)
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(FIVE YEARS 0)

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Published By IEEE Comput. Soc

076950387x

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Estimating functional unit number in the PISH codedesign system by using Petri nets

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387) ◽

10.1109/sbcci.1999.802962 ◽

2003 ◽

Cited By ~ 2

Author(s):

P. Maciel ◽

E. Barros ◽

W. Rosenstiel

Keyword(s):

Petri Nets ◽

Functional Unit

Codesign system performance based on memory configurations

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387) ◽

10.1109/sbcci.1999.802963 ◽

2003 ◽

Author(s):

L. de M. Mourelle ◽

N. Nedjah

Keyword(s):

System Performance

A 9-bit parallel pipelined multiplier based on the 3-bit recoding from Booth's algorithm

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387) ◽

10.1109/sbcci.1999.802974 ◽

2003 ◽

Author(s):

L. Caldeira ◽

T.C. Pimenta ◽

E.D.C. Cotrim

Keyword(s):

Parallel Pipelined ◽

Pipelined Multiplier

A tool for analysis of universal logic gates functionality

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387) ◽

10.1109/sbcci.1999.803116 ◽

2003 ◽

Author(s):

F.G. de Lima ◽

M.de.O. Johann ◽

J.L. Guntzel ◽

L. Carro ◽

R. Reis

Keyword(s):

Logic Gates ◽

Universal Logic

Test escapes: analysis of short defect

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387) ◽

10.1109/sbcci.1999.803111 ◽

2003 ◽

Cited By ~ 1

Author(s):

M. Renovell ◽

F. Azdis ◽

Y. Bertrand

Keyword(s):

Test Escapes

High speed FIR filters for digital decimation

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387) ◽

10.1109/sbcci.1999.803103 ◽

2003 ◽

Cited By ~ 3

Author(s):

M. Brambilla ◽

D. Guidi ◽

V. Liberali

Keyword(s):

High Speed ◽

Fir Filters

MCA: a single chip one-port scalable ATM layer controller

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387) ◽

10.1109/sbcci.1999.802975 ◽

2003 ◽

Cited By ~ 2

Author(s):

J.A.G. de Lima ◽

E.U.K. Melchier ◽

A.C. Cavalcanti

Keyword(s):

Single Chip

Power optimization using dynamic power management

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387) ◽

10.1109/sbcci.1999.803105 ◽

2003 ◽

Cited By ~ 4

Author(s):

J.C. Monteiro

Keyword(s):

Power Management ◽

Power Optimization ◽

Dynamic Power Management ◽

Dynamic Power

Circuit-level considerations for mixed signal programmable components

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387) ◽

10.1109/sbcci.1999.803098 ◽

2003 ◽

Cited By ~ 1

Author(s):

L. Carro

Keyword(s):

Mixed Signal

Register files constraint satisfaction during scheduling of DSP code

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387) ◽

10.1109/sbcci.1999.802971 ◽

2003 ◽

Cited By ~ 1

Author(s):

C.A.A. Pinto ◽

B. Mesman ◽

K. Van Eijk

Keyword(s):

Constraint Satisfaction ◽

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc

Estimating functional unit number in the PISH codedesign system by using Petri nets

Codesign system performance based on memory configurations

A 9-bit parallel pipelined multiplier based on the 3-bit recoding from Booth's algorithm

A tool for analysis of universal logic gates functionality

Test escapes: analysis of short defect

High speed FIR filters for digital decimation

MCA: a single chip one-port scalable ATM layer controller

Power optimization using dynamic power management

Circuit-level considerations for mixed signal programmable components

Register files constraint satisfaction during scheduling of DSP code

Proceedings. XII Symposium on Integrated Circuits and Systems Design (Cat. No.PR00387)
Latest Publications