Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17
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9781450349727

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Boolean Decomposition for AIG Optimization

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060420 ◽

2017 ◽

Author(s):

Lucas Machado ◽

Jordi Cortadella

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Combining Restorability and Error Detection Ability for Effective Trace Signal Selection

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060475 ◽

2017 ◽

Author(s):

Binod Kumar ◽

Ankit Jindal ◽

Masahiro Fujita ◽

Virendra Singh

Keyword(s):

Error Detection ◽

Detection Ability ◽

Signal Selection

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Energy Efficient Adaptive Approach for Dependable Performance in the presence of Timing Interference

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060449 ◽

2017 ◽

Author(s):

Nikolaos Zompakis ◽

Michail Noltsis ◽

Dimitrios Rodopoulos ◽

Francky Catthoor ◽

Dimitrios Soudris

Keyword(s):

Energy Efficient ◽

Adaptive Approach

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Combined Centralized and Distributed Connection Allocation in Large TDM Circuit Switching NoCs

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060414 ◽

2017 ◽

Author(s):

Yong Chen ◽

Emil Matus ◽

Gerhard P. Fettweis

Keyword(s):

Circuit Switching

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Design of a Flash-based Circuit for Multi-valued Logic

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060452 ◽

2017 ◽

Author(s):

Monther Abusultan ◽

Sunil P. Khatri

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Efficient and Secure On-Chip Reconfigurable Voltage Regulation for IoT Devices

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060496 ◽

2017 ◽

Author(s):

Selçuk Köse

Keyword(s):

Voltage Regulation ◽

Iot Devices ◽

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On the Role of Sequential Circuits in Stochastic Computing

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060453 ◽

2017 ◽

Author(s):

Paishun Ting ◽

John P. Hayes

Keyword(s):

Sequential Circuits ◽

Stochastic Computing

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A Reconfigurable Replica Bitline to Determine Optimum SRAM Sense Amplifier Set Time

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060463 ◽

2017 ◽

Author(s):

Samira Ataei ◽

James E. Stiner

Keyword(s):

Sense Amplifier

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A Mixed-Size Monolithic 3D Placer with 2D Layout Inheritance

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060411 ◽

2017 ◽

Author(s):

Xu He ◽

Yao Wang ◽

Yang Guo ◽

Sorin Cotofana

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Low Voltage Stochastic Flash ADC with Front-end of Inverter-based Comparative Unit

Proceedings of the on Great Lakes Symposium on VLSI 2017 - GLSVLSI '17 ◽

10.1145/3060403.3060466 ◽

2017 ◽

Author(s):

Xuncheng Zou ◽

Bo Liu ◽

Shigetoshi Nakatake

Keyword(s):

Low Voltage ◽

Flash Adc ◽

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