Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10
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9781450300124

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Low power nanoscale buffer management for network on chip routers

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785540 ◽

2010 ◽

Author(s):

Suman K. Mandal ◽

Ron Denton ◽

Saraju P. Mohanty ◽

Rabi N. Mahapatra

Keyword(s):

Low Power ◽

Buffer Management ◽

Network On Chip ◽

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8Gb/s capacitive low power and high speed 4-PWAM transceiver design

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785491 ◽

2010 ◽

Author(s):

Young Bok Kim ◽

Yong-Bin Kim ◽

Fabrizio Lombardi

Keyword(s):

Low Power ◽

Transceiver Design

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Performance assessment of analog circuits with carbon nanotube FET (CNFET)

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785521 ◽

2010 ◽

Author(s):

Janardhanan S. Ajit ◽

Yong-Bin Kim ◽

Minsu Choi

Keyword(s):

Carbon Nanotube ◽

Performance Assessment ◽

Analog Circuits ◽

Carbon Nanotube Fet

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Deterministic broadside test generation for transition path delay faults

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785514 ◽

2010 ◽

Author(s):

Bo Yao ◽

Irith Pomeranz ◽

Sudhakar M. Reddy

Keyword(s):

Test Generation ◽

Delay Faults ◽

Path Delay Faults ◽

Transition Path

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On-die sensors for measuring process and environmental variations in integrated circuits

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785517 ◽

2010 ◽

Author(s):

Kanak Agarwal

Keyword(s):

Integrated Circuits ◽

Measuring Process ◽

Environmental Variations

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Scaling power/ground solvers on multi-core with memory bandwidth awareness

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785488 ◽

2010 ◽

Author(s):

Jin Shi ◽

Yici Cai

Keyword(s):

Memory Bandwidth ◽

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Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785552 ◽

2010 ◽

Author(s):

Mohamed M. Sabry ◽

Martino Ruggiero ◽

Pablo G. Del Valle

Keyword(s):

Energy Trade ◽

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Temperature-constrained fixed-outline floorplanning for die-stacking system-in-package design

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785580 ◽

2010 ◽

Author(s):

De-Yu Liu ◽

Wai-Kei Mak ◽

Ting-Chi Wang

Keyword(s):

Package Design ◽

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Software adaptation in quality sensitive applications to deal with hardware variability

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785501 ◽

2010 ◽

Author(s):

Aashish Pant ◽

Puneet Gupta ◽

Mihaela van der Schaar

Keyword(s):

Software Adaptation

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On-chip power supply noise and its implications on timing

Proceedings of the 20th symposium on Great lakes symposium on VLSI - GLSVLSI '10 ◽

10.1145/1785481.1785571 ◽

2010 ◽

Author(s):

Lars J. Svensson ◽

Johnny Pihl ◽

Daniel A. Andersson ◽

Per Larsson-Edefors

Keyword(s):

Power Supply ◽

Power Supply Noise ◽

Supply Noise ◽

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