Proceedings Sixteenth Conference on Advanced Research in VLSI
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Published By IEEE Comput. Soc. Press

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Code density optimization for embedded DSP processors using data compression techniques

Proceedings Sixteenth Conference on Advanced Research in VLSI ◽

10.1109/arvlsi.1995.515626 ◽

2002 ◽

Cited By ~ 43

Author(s):

S.Y. Liao ◽

S. Devadas ◽

K. Keutzer

Keyword(s):

Data Compression ◽

Embedded Dsp ◽

Using Data ◽

Dsp Processors ◽

Code Density

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HAL: heuristic algorithms for layout synthesis

Proceedings Sixteenth Conference on Advanced Research in VLSI ◽

10.1109/arvlsi.1995.515620 ◽

2002 ◽

Author(s):

S. Rekhi ◽

J.D. Trotter

Keyword(s):

Heuristic Algorithms ◽

Layout Synthesis

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Silicon VLSI processing architectures incorporating integrated optoelectronic devices

Proceedings Sixteenth Conference on Advanced Research in VLSI ◽

10.1109/arvlsi.1995.515608 ◽

2002 ◽

Cited By ~ 9

Author(s):

H.H. Cat ◽

M. Lee ◽

B. Buchanan ◽

D.S. Wills ◽

M. Brooke ◽

...

Keyword(s):

Optoelectronic Devices ◽

Processing Architectures ◽

Silicon Vlsi

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A technique for high-speed, fine-resolution pattern generation and its CMOS implementation

Proceedings Sixteenth Conference on Advanced Research in VLSI ◽

10.1109/arvlsi.1995.515616 ◽

2002 ◽

Cited By ~ 2

Author(s):

G.C. Moyer ◽

M. Clements ◽

Wentai Liu ◽

T. Schaffer ◽

R.K. Cavin

Keyword(s):

High Speed ◽

Pattern Generation ◽

Fine Resolution ◽

Cmos Implementation

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Efficient Galerkin techniques for multipole-accelerated capacitance extraction of 3-D structures with multiple dielectrics

Proceedings Sixteenth Conference on Advanced Research in VLSI ◽

10.1109/arvlsi.1995.515621 ◽

2002 ◽

Cited By ~ 7

Author(s):

X. Cai ◽

K. Nabors ◽

J. White

Keyword(s):

Capacitance Extraction

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Recursive layout generation

Proceedings Sixteenth Conference on Advanced Research in VLSI ◽

10.1109/arvlsi.1995.515619 ◽

2002 ◽

Cited By ~ 1

Author(s):

L.M. Monier ◽

R.W. Haddad ◽

J. Dion

Keyword(s):

Layout Generation

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Standard CMOS active pixel image sensors for multimedia applications

Proceedings Sixteenth Conference on Advanced Research in VLSI ◽

10.1109/arvlsi.1995.515622 ◽

2002 ◽

Cited By ~ 17

Author(s):

A. Dickinson ◽

B. Ackland ◽

E.-S. Eid ◽

D. Inglis ◽

E.R. Fossum

Keyword(s):

Multimedia Applications ◽

Image Sensors ◽

Active Pixel ◽

Pixel Image

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Single-transistor transparent-latch clocking

Proceedings Sixteenth Conference on Advanced Research in VLSI ◽

10.1109/arvlsi.1995.515630 ◽

2002 ◽

Cited By ~ 1

Author(s):

Kei-Yong Khoo ◽

A.N. Willson

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An evaluation of bipartitioning techniques

Proceedings Sixteenth Conference on Advanced Research in VLSI ◽

10.1109/arvlsi.1995.515634 ◽

2002 ◽

Cited By ~ 28

Author(s):

S. Hauck ◽

G. Borriello

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OPTIMUS: a new program for OPTIMizing linear circuits with number-splitting and shift-and-add decompositions

Proceedings Sixteenth Conference on Advanced Research in VLSI ◽

10.1109/arvlsi.1995.515625 ◽

2002 ◽

Cited By ~ 4

Author(s):

Huy Nguyen ◽

A. Chatterjee

Keyword(s):

Linear Circuits

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Proceedings Sixteenth Conference on Advanced Research in VLSILatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc. Press

Code density optimization for embedded DSP processors using data compression techniques

HAL: heuristic algorithms for layout synthesis

Silicon VLSI processing architectures incorporating integrated optoelectronic devices

A technique for high-speed, fine-resolution pattern generation and its CMOS implementation

Efficient Galerkin techniques for multipole-accelerated capacitance extraction of 3-D structures with multiple dielectrics

Recursive layout generation

Standard CMOS active pixel image sensors for multimedia applications

Single-transistor transparent-latch clocking

An evaluation of bipartitioning techniques

OPTIMUS: a new program for OPTIMizing linear circuits with number-splitting and shift-and-add decompositions

Proceedings Sixteenth Conference on Advanced Research in VLSI
Latest Publications