Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08
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Published By ACM Press

9781595939999

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A linear programming formulation for security-aware gate sizing

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 ◽

10.1145/1366110.1366176 ◽

2008 ◽

Cited By ~ 14

Author(s):

Koustav Bhattacharya ◽

Nagarajan Ranganathan

Keyword(s):

Linear Programming ◽

Gate Sizing ◽

Programming Formulation ◽

Linear Programming Formulation

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Scalable and fault-tolerant network-on-chip design usingthe quartered recursive diagonal torus topology

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 ◽

10.1145/1366110.1366184 ◽

2008 ◽

Author(s):

Xianfang Tan ◽

Lei Zhang ◽

Shankar Neelkrishnan ◽

Mei Yang ◽

Yingtao Jiang ◽

...

Keyword(s):

Fault Tolerant ◽

Network On Chip ◽

Chip Design ◽

On Chip

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Full-chip leakage current estimation based on statistical sampling techniques

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 ◽

10.1145/1366110.1366203 ◽

2008 ◽

Cited By ~ 3

Author(s):

Shaobo Liu ◽

Qinru Qiu ◽

Qing Wu

Keyword(s):

Leakage Current ◽

Sampling Techniques ◽

Statistical Sampling ◽

Current Estimation

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On-die CMOS voltage droop detection and dynamiccompensation

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 ◽

10.1145/1366110.1366122 ◽

2008 ◽

Cited By ~ 1

Author(s):

Matthew Seetharam A. Holtz ◽

Seetharam Narasimhan ◽

Swarup Bhunia

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Simultaneous optimization of total power, crosstalk noise, and delay under uncertainty

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 ◽

10.1145/1366110.1366154 ◽

2008 ◽

Cited By ~ 2

Author(s):

N. Ranganathan ◽

U. Gupta ◽

V. Mahalingam

Keyword(s):

Simultaneous Optimization ◽

Total Power ◽

Crosstalk Noise

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New technique in design of active rf cmos mixers for low flicker noise and high conversion gain

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 ◽

10.1145/1366110.1366142 ◽

2008 ◽

Cited By ~ 1

Author(s):

Yarallah Koolivand ◽

Seyed Morteza Alavi ◽

Omid Shoaei

Keyword(s):

Flicker Noise ◽

New Technique ◽

High Conversion ◽

Conversion Gain ◽

Rf Cmos

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A low-power phase change memory based hybrid cache architecture

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 ◽

10.1145/1366110.1366204 ◽

2008 ◽

Cited By ~ 37

Author(s):

Prasanth Mangalagiri ◽

Karthik Sarpatwari ◽

Aditya Yanamandra ◽

VijayKrishnan Narayanan ◽

Yuan Xie ◽

...

Keyword(s):

Low Power ◽

Phase Change ◽

Phase Change Memory ◽

Cache Architecture ◽

Hybrid Cache ◽

Change Memory

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Using reiterative LFSR based X-masking to increase output compression in presence of unknowns

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 ◽

10.1145/1366110.1366194 ◽

2008 ◽

Cited By ~ 1

Author(s):

Richard Putman

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Simultaneous optimization of memory configuration and code allocation for low power embedded systems

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 ◽

10.1145/1366110.1366206 ◽

2008 ◽

Cited By ~ 2

Author(s):

Tadayuki Matsumura ◽

Tohru Ishihara ◽

Hiroto Yasuura

Keyword(s):

Embedded Systems ◽

Low Power ◽

Simultaneous Optimization

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An analytical approach to placement legalization

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08 ◽

10.1145/1366110.1366152 ◽

2008 ◽

Cited By ~ 1

Author(s):

Andrey Ayupov ◽

Alexander Marchenko ◽

Vladimir Tiourin

Keyword(s):

Analytical Approach

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Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

A linear programming formulation for security-aware gate sizing

Scalable and fault-tolerant network-on-chip design usingthe quartered recursive diagonal torus topology

Full-chip leakage current estimation based on statistical sampling techniques

On-die CMOS voltage droop detection and dynamiccompensation

Simultaneous optimization of total power, crosstalk noise, and delay under uncertainty

New technique in design of active rf cmos mixers for low flicker noise and high conversion gain

A low-power phase change memory based hybrid cache architecture

Using reiterative LFSR based X-masking to increase output compression in presence of unknowns

Simultaneous optimization of memory configuration and code allocation for low power embedded systems

An analytical approach to placement legalization

Proceedings of the 18th ACM Great Lakes symposium on VLSI - GLSVLSI '08
Latest Publications