VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence
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Published By WORLD SCIENTIFIC

9789810223120, 9789812797766

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

VLSI IMPLEMENTATION OF AN EFFICIENT ASIC ARCHITECTURE FOR REAL-TIME ROTATION OF DIGITAL IMAGES

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence ◽

10.1142/9789812797766_0013 ◽

1995 ◽

pp. 277-290

Author(s):

INDRADEEP GHOSH ◽

BANDANA MAJUMDAR

Keyword(s):

Real Time ◽

Digital Images ◽

Vlsi Implementation

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A FAST PATTERN-MATCHING ALGORITHM ON MODULAR MESH-CONNECTED COMPUTERS WITH MULTIPLE BUSES

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence ◽

10.1142/9789812797766_0011 ◽

1995 ◽

pp. 239-247

Author(s):

KUO-LIANG CHUNG

Keyword(s):

Pattern Matching ◽

Matching Algorithm ◽

Pattern Matching Algorithm ◽

Multiple Buses

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HIGH-SPEED PARALLEL VLSI ARCHITECTURES FOR IMAGE DECORRELATION

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence ◽

10.1142/9789812797766_0008 ◽

1995 ◽

pp. 171-193

Author(s):

TINKU ACHARYA ◽

AMAR MUKHERJEE

Keyword(s):

High Speed ◽

Vlsi Architectures

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SYSTOLIC MERGING AND RANKING OF VOTES FOR THE GENERALIZED HOUGH TRANSFORM

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence ◽

10.1142/9789812797766_0007 ◽

1995 ◽

pp. 143-169 ◽

Cited By ~ 1

Author(s):

M. ALBANESI ◽

M. FERRETTI

Keyword(s):

Hough Transform ◽

Generalized Hough Transform

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A RECONFIGURABLE ARCHITECTURE FOR IMAGE PROCESSING AND COMPUTER VISION

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence ◽

10.1142/9789812797766_0003 ◽

1995 ◽

pp. 29-57 ◽

Cited By ~ 5

Author(s):

SUCHENDRA M. BHANDARKAR ◽

HAMID R. ARABNIA ◽

JEFFREY W. SMITH

Keyword(s):

Image Processing ◽

Computer Vision ◽

Reconfigurable Architecture

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ENPASSANT: AN ENVIRONMENT FOR EVALUATING MASSIVELY PARALLEL ARRAY ARCHITECTURES FOR SPATIALLY MAPPED APPLICATIONS

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence ◽

10.1142/9789812797766_0002 ◽

1995 ◽

pp. 3-28 ◽

Cited By ~ 1

Author(s):

MARTIN C. HERBORDT ◽

CHARLES C. WEEMS

Keyword(s):

Massively Parallel ◽

Parallel Array

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A VLSI PARALLEL ARCHITECTURE FOR FUZZY EXPERT SYSTEMS

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence ◽

10.1142/9789812797766_0012 ◽

1995 ◽

pp. 249-275 ◽

Cited By ~ 1

Author(s):

V. CATANIA ◽

G. ASCIA

Keyword(s):

Expert Systems ◽

Parallel Architecture ◽

Fuzzy Expert Systems

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PMAC: A POLYGON MATCHING CHIP

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence ◽

10.1142/9789812797766_0009 ◽

1995 ◽

pp. 195-213

Author(s):

RAGHU SASTRY ◽

N. RANGANATHAN

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A DESIGN METHODOLGY FOR VERY LARGE ARRAY PROCESSORS—PART 2: PACUBE VLSI ARRAYS

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence ◽

10.1142/9789812797766_0005 ◽

1995 ◽

pp. 91-129

Author(s):

N. VENKATESWARAN ◽

S. PATTABIRAMAN ◽

J. DESOUZA ◽

G. SRIRAM ◽

R. SRINIVASAN ◽

...

Keyword(s):

Large Array ◽

Very Large Array ◽

Array Processors

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A DESIGN METHODOLOGY FOR VERY LARGE ARRAY PROCESSORS—PART 1: GIPOP PROCESSOR ARRAY

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence ◽

10.1142/9789812797766_0004 ◽

1995 ◽

pp. 59-90

Author(s):

N. VENKATESWARAN ◽

S. PATTABIRAMAN ◽

R. DEVANATHAN ◽

B. KUMARAN ◽

ASHRAF AHMED ◽

...

Keyword(s):

Design Methodology ◽

Processor Array ◽

Large Array ◽

Very Large Array ◽

Array Processors

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VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial IntelligenceLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By WORLD SCIENTIFIC

VLSI IMPLEMENTATION OF AN EFFICIENT ASIC ARCHITECTURE FOR REAL-TIME ROTATION OF DIGITAL IMAGES

A FAST PATTERN-MATCHING ALGORITHM ON MODULAR MESH-CONNECTED COMPUTERS WITH MULTIPLE BUSES

HIGH-SPEED PARALLEL VLSI ARCHITECTURES FOR IMAGE DECORRELATION

SYSTOLIC MERGING AND RANKING OF VOTES FOR THE GENERALIZED HOUGH TRANSFORM

A RECONFIGURABLE ARCHITECTURE FOR IMAGE PROCESSING AND COMPUTER VISION

ENPASSANT: AN ENVIRONMENT FOR EVALUATING MASSIVELY PARALLEL ARRAY ARCHITECTURES FOR SPATIALLY MAPPED APPLICATIONS

A VLSI PARALLEL ARCHITECTURE FOR FUZZY EXPERT SYSTEMS

PMAC: A POLYGON MATCHING CHIP

A DESIGN METHODOLGY FOR VERY LARGE ARRAY PROCESSORS—PART 2: PACUBE VLSI ARRAYS

A DESIGN METHODOLOGY FOR VERY LARGE ARRAY PROCESSORS—PART 1: GIPOP PROCESSOR ARRAY

VLSI and Parallel Computing for Pattern Recognition and Artificial Intelligence - Series in Machine Perception and Artificial Intelligence
Latest Publications