A Novel Load Shedding Scheme for Voltage Stability

Undervoltage load shedding serves to maintain voltage stability when a majority of loads are fast acting. An undervoltage load shedding scheme should address two tasks: the detection of voltage instability following a large disturbance and the determination of the amount of load to be shed. Additionally, in case of short-term voltage instability, the scheme should be fast. This paper proposes a method to predict voltage instability arising due to a large disturbance. The amount of load to be shed to maintain voltage stability is then determined from the Thevenin equivalent of the network as seen from the local bus. The proposed method uses local measurements of bus voltage and power, and does not require knowledge of the network. The method is validated by simulation of three test systems subjected to a large disturbance. The proposed scheme is fairly accurate in estimating the minimum amount of load to be shed to maintain stability. The method is also successful in maintaining stability in cases where voltage collapse is detected at multiple buses.

Matpower CPF Program Improvement and Steady-State Voltage Stability Analysis

In steady-state voltage stability analysis, Continuation power flow (CPF) method is widely used for it can track power flow solution at the critical voltage point. The existing matpower CPF program can only simulate PV curve of a single bus when load increases at one certain bus. In this paper, original CPF program will be modified to be more flexible and in line with the actual situation. Several indices will be proposed to discuss how to determine the first crash bus (namely the system vulnerabilities) when load increases at multiple buses. Simulation results of a regional power grid in northern China verify the validity and practicability of the proposed method.

A FAST PATTERN-MATCHING ALGORITHM ON MODULAR MESH-CONNECTED COMPUTERS WITH MULTIPLE BUSES

Given a pattern of length m and a text of length n, commonly m≪n, this paper presents a randomized parallel algorithm for pattern matching in O(n1/10) (=O(n1/10+(n−m)1/10)) time on a newly proposed n3/5×n2/5 modular meshconnected computers with multiple buses. Furthermore, the time bound of our parallel algorithm can be reduced to O(n1/11) if fewer processors are used.