Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing
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Published By Springer Netherlands

9789048199648, 9789048199655

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Efficient Memory Management for Uniform and Recursive Grid Traversal

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing ◽

10.1007/978-90-481-9965-5_2 ◽

2011 ◽

pp. 27-51 ◽

Cited By ~ 1

Author(s):

Tomasz Toczek ◽

Stéphane Mancini

Keyword(s):

Memory Management ◽

Efficient Memory

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Lossless Multi-Mode Interband Image Compression and Its Hardware Architecture

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing ◽

10.1007/978-90-481-9965-5_1 ◽

2011 ◽

pp. 3-26 ◽

Cited By ~ 3

Author(s):

Xiaolin Chen ◽

Nishan Canagarajah ◽

Jose L. Nunez-Yanez

Keyword(s):

Image Compression ◽

Hardware Architecture ◽

Multi Mode

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SystemC Multiprocessor RTOS Model for Services Distribution on MPSoC Platforms

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing ◽

10.1007/978-90-481-9965-5_9 ◽

2011 ◽

pp. 197-215

Author(s):

Benoît Miramond ◽

Emmanuel Huck ◽

Thomas Lefebvre ◽

François Verdier

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A High Level Synthesis Flow Using Model Driven Engineering

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing ◽

10.1007/978-90-481-9965-5_12 ◽

2011 ◽

pp. 253-274 ◽

Cited By ~ 1

Author(s):

Sebastien Le Beux ◽

Laurent Moss ◽

Philippe Marquet ◽

Jean-Luc Dekeyser

Keyword(s):

High Level Synthesis ◽

Model Driven Engineering ◽

Model Driven ◽

High Level

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RANN: A Reconfigurable Artificial Neural Network Model for Task Scheduling on Reconfigurable System-on-Chip

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing ◽

10.1007/978-90-481-9965-5_6 ◽

2011 ◽

pp. 117-144

Author(s):

Daniel Chillet ◽

Sébastien Pillement ◽

Olivier Sentieys

Keyword(s):

Neural Network ◽

Artificial Neural Network ◽

Network Model ◽

Task Scheduling ◽

Neural Network Model ◽

Artificial Neural Network Model ◽

System On Chip ◽

Reconfigurable System ◽

Artificial Neural ◽

On Chip

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A List Scheduling Heuristic with New Node Priorities and Critical Child Technique for Task Scheduling with Communication Contention

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing ◽

10.1007/978-90-481-9965-5_10 ◽

2011 ◽

pp. 217-236 ◽

Cited By ~ 4

Author(s):

Pengcheng Mu ◽

Jean-François Nezan ◽

Mickaël Raulet

Keyword(s):

Task Scheduling ◽

List Scheduling ◽

Scheduling Heuristic

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End-to-End Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing ◽

10.1007/978-90-481-9965-5_8 ◽

2011 ◽

pp. 171-194

Author(s):

Jérémie Crenne ◽

Pierre Bomel ◽

Guy Gogniat ◽

Jean-Philippe Diguet

Keyword(s):

Reconfigurable Systems ◽

End To End

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Mapping a Telecommunication Application on a Multiprocessor System-on-Chip

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing ◽

10.1007/978-90-481-9965-5_3 ◽

2011 ◽

pp. 53-77 ◽

Cited By ~ 5

Author(s):

Daniela Genius ◽

Etienne Faure ◽

Nicolas Pouillon

Keyword(s):

System On Chip ◽

Multiprocessor System ◽

Telecommunication Application ◽

On Chip

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Generation of Hardware/Software Systems Based on CAL Dataflow Description

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing ◽

10.1007/978-90-481-9965-5_13 ◽

2011 ◽

pp. 275-292 ◽

Cited By ~ 2

Author(s):

Richard Thavot ◽

Romuald Mosqueron ◽

Julien Dubois ◽

Marco Mattavelli

Keyword(s):

Software Systems

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Multiprocessor Scheduling of Dataflow Programs within the Reconfigurable Video Coding Framework

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing ◽

10.1007/978-90-481-9965-5_11 ◽

2011 ◽

pp. 237-251 ◽

Cited By ~ 1

Author(s):

Jani Boutellier ◽

Christophe Lucarz ◽

Victor Martin Gomez ◽

Marco Mattavelli ◽

Olli Silvén

Keyword(s):

Video Coding ◽

Multiprocessor Scheduling ◽

Reconfigurable Video Coding

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Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image ProcessingLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Netherlands

Efficient Memory Management for Uniform and Recursive Grid Traversal

Lossless Multi-Mode Interband Image Compression and Its Hardware Architecture

SystemC Multiprocessor RTOS Model for Services Distribution on MPSoC Platforms

A High Level Synthesis Flow Using Model Driven Engineering

RANN: A Reconfigurable Artificial Neural Network Model for Task Scheduling on Reconfigurable System-on-Chip

A List Scheduling Heuristic with New Node Priorities and Critical Child Technique for Task Scheduling with Communication Contention

End-to-End Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems

Mapping a Telecommunication Application on a Multiprocessor System-on-Chip

Generation of Hardware/Software Systems Based on CAL Dataflow Description

Multiprocessor Scheduling of Dataflow Programs within the Reconfigurable Video Coding Framework

Lecture Notes in Electrical Engineering - Algorithm-Architecture Matching for Signal and Image Processing
Latest Publications