Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05

Retargetable generation of TLM bus interfaces for MP-SoC platforms

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05 ◽

10.1145/1084834.1084898 ◽

2005 ◽

Cited By ~ 3

Author(s):

Andreas Wieferink ◽

Rainer Leupers ◽

Gerd Ascheid ◽

Heinrich Meyr ◽

Tom Michiels ◽

...

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System-level design automation tools for digital microfluidic biochips

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05 ◽

10.1145/1084834.1084887 ◽

2005 ◽

Author(s):

Krishnendu Chakrabarty ◽

Fei Su

Keyword(s):

Design Automation ◽

System Level ◽

System Level Design ◽

Microfluidic Biochips ◽

Level Design ◽

Digital Microfluidic ◽

Automation Tools

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Enabling unrestricted automated synthesis of portable hardware accelerators for virtual machines

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05 ◽

10.1145/1084834.1084896 ◽

2005 ◽

Cited By ~ 1

Author(s):

Miljan VuletiĆ ◽

Christophe Dubach ◽

Laura Pozzi ◽

Paolo Ienne

Keyword(s):

Virtual Machines ◽

Hardware Accelerators ◽

Automated Synthesis

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Future processors

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05 ◽

10.1145/1084834.1084840 ◽

2005 ◽

Cited By ~ 8

Author(s):

Charlie Johnson ◽

Jeff Welser

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Efficient performance analysis of asynchronous systems based on periodicity

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05 ◽

10.1145/1084834.1084892 ◽

2005 ◽

Cited By ~ 12

Author(s):

Peggy B. McGee ◽

Steven M. Nowick ◽

E. G. Coffman

Keyword(s):

Performance Analysis ◽

Asynchronous Systems ◽

Efficient Performance

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An efficient direct mapped instruction cache for application-specific embedded systems

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05 ◽

10.1145/1084834.1084850 ◽

2005 ◽

Cited By ~ 8

Author(s):

Chuanjun Zhang

Keyword(s):

Embedded Systems ◽

Instruction Cache ◽

Application Specific

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Memory access optimizations in instruction-set simulators

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05 ◽

10.1145/1084834.1084895 ◽

2005 ◽

Cited By ~ 1

Author(s):

Mehrdad Reshadi ◽

Prabhat Mishra

Keyword(s):

Memory Access ◽

Instruction Set ◽

Instruction Set Simulators

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Efficient behavior-driven runtime dynamic voltage scaling policies

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05 ◽

10.1145/1084834.1084864 ◽

2005 ◽

Cited By ~ 10

Author(s):

Fen Xie ◽

Margaret Martonosi ◽

Sharad Malik

Keyword(s):

Voltage Scaling ◽

Dynamic Voltage Scaling ◽

Dynamic Voltage

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Power-smart system-on-chip architecture for embedded cryptosystems

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05 ◽

10.1145/1084834.1084883 ◽

2005 ◽

Cited By ~ 12

Author(s):

R. Muresan ◽

H. Vahedi ◽

Y. Zhanrong ◽

S. Gregori

Keyword(s):

System On Chip ◽

Smart System ◽

On Chip

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The design of a smart imaging core for automotive and consumer applications

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05 ◽

10.1145/1084834.1084870 ◽

2005 ◽

Author(s):

Wido Kruijtzer ◽

Winfried Gehrke ◽

Victor Reyes ◽

Ghiath Alkadi ◽

Thomas Hinz ◽

...

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Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

Retargetable generation of TLM bus interfaces for MP-SoC platforms

System-level design automation tools for digital microfluidic biochips

Enabling unrestricted automated synthesis of portable hardware accelerators for virtual machines

Future processors

Efficient performance analysis of asynchronous systems based on periodicity

An efficient direct mapped instruction cache for application-specific embedded systems

Memory access optimizations in instruction-set simulators

Efficient behavior-driven runtime dynamic voltage scaling policies

Power-smart system-on-chip architecture for embedded cryptosystems

The design of a smart imaging core for automotive and consumer applications

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Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

Retargetable generation of TLM bus interfaces for MP-SoC platforms

System-level design automation tools for digital microfluidic biochips

Enabling unrestricted automated synthesis of portable hardware accelerators for virtual machines

Future processors

Efficient performance analysis of asynchronous systems based on periodicity

An efficient direct mapped instruction cache for application-specific embedded systems

Memory access optimizations in instruction-set simulators

Efficient behavior-driven runtime dynamic voltage scaling policies

Power-smart system-on-chip architecture for embedded cryptosystems

The design of a smart imaging core for automotive and consumer applications

Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis - CODES+ISSS '05
Latest Publications