2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC)
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9781457702372

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BIST for strongly-indicating asynchronous circuits

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041359 ◽

2009 ◽

Cited By ~ 1

Author(s):

Deepali Koppad ◽

Aris Efthymiou

Keyword(s):

Asynchronous Circuits

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FSM-controlled architectures for linear invasion

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041331 ◽

2009 ◽

Cited By ~ 3

Author(s):

Farhadur Arifin ◽

Richard Membarth ◽

Abdulazim Amouri ◽

Frank Hannig ◽

Jurgen Teich

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Title pages

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041314 ◽

2009 ◽

Keyword(s):

Title Pages

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Structural heuristics for SAT-based ATPG

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041334 ◽

2009 ◽

Cited By ~ 1

Author(s):

Daniel Tille ◽

Stephan Eggersgluss ◽

Hoang M. Le ◽

Rolf Drechsler

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On-chip timing slack monitoring

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041336 ◽

2009 ◽

Cited By ~ 6

Author(s):

B. Rebaud ◽

M. Belleville ◽

E. Beigne ◽

M. Robert ◽

P. Maurine ◽

...

Keyword(s):

On Chip

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Observability-based coverage-directed path search using PBO for automatic test vector generation

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041346 ◽

2009 ◽

Cited By ~ 1

Author(s):

Jose C. Costa ◽

Jose C. Monteiro

Keyword(s):

Test Vector ◽

Directed Path ◽

Automatic Test ◽

Vector Generation ◽

Path Search ◽

Test Vector Generation

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Foreword

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041316 ◽

2009 ◽

Cited By ~ 2

Author(s):

Ricardo Reis ◽

Juergen Becker

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SyntHorus: Highly efficient automatic synthesis from PSL to HDL

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041335 ◽

2009 ◽

Cited By ~ 5

Author(s):

Yann Oddos ◽

Katell Morin-Allory ◽

Dominique Borrione

Keyword(s):

Automatic Synthesis ◽

Highly Efficient

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Scaling of advanced floating body Z-RAM storage cells: A modeling approach

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041352 ◽

2009 ◽

Author(s):

Viktor Sverdlov ◽

Siegfried Selberherr

Keyword(s):

Floating Body ◽

Modeling Approach ◽

Storage Cells

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IVM: An interoperable verification methodology for iterative and incremental digital system design

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC) ◽

10.1109/vlsisoc.2009.6041357 ◽

2009 ◽

Author(s):

Bruno Prado ◽

Edna Barros ◽

Luciano Silva ◽

Adelmario Cabrai ◽

Romulo Bruno ◽

...

Keyword(s):

System Design ◽

Digital System ◽

Digital System Design ◽

Verification Methodology

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2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

BIST for strongly-indicating asynchronous circuits

FSM-controlled architectures for linear invasion

Title pages

Structural heuristics for SAT-based ATPG

On-chip timing slack monitoring

Observability-based coverage-directed path search using PBO for automatic test vector generation

Foreword

SyntHorus: Highly efficient automatic synthesis from PSL to HDL

Scaling of advanced floating body Z-RAM storage cells: A modeling approach

IVM: An interoperable verification methodology for iterative and incremental digital system design

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC)
Latest Publications