2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)

RePAiR: A Strategy for Reducing Peak Temperature while Maximising Accuracy of Approximate Real-Time Computing: Work-in-Progress

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) ◽

10.1109/codesisss51650.2020.9244040 ◽

2020 ◽

Author(s):

Shounak Chakraborty ◽

Sangeet Saha ◽

Magnus Sjalander ◽

Klaus McDonald-Maier

Keyword(s):

Real Time ◽

Peak Temperature ◽

Work In Progress ◽

Real Time Computing

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A New Hardware Trojan Design: Distinguishing Between Trigger Inputs and Functional Inputs Is Difficult: Work-in-Progress

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) ◽

10.1109/codesisss51650.2020.9244021 ◽

2020 ◽

Author(s):

Minghui Ge ◽

Ying Zhang ◽

Sen Li ◽

Jiaqi Yao ◽

Zhiming Mao ◽

...

Keyword(s):

Hardware Trojan ◽

Work In Progress

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Work-in-Progress: Enabling Edge-based Self-Navigation in Earthquake-Struck Zones

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) ◽

10.1109/codesisss51650.2020.9244030 ◽

2020 ◽

Author(s):

Ryan Zelek ◽

Vignesh K. Venkateshwar ◽

Sai K. Duggineni ◽

Renu Dighe ◽

Hyeran Jeon

Keyword(s):

Work In Progress ◽

Edge Based

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Accelerating Queries of MongoDB by an FPGA-based Storage Engine: Work-in-Progress

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) ◽

10.1109/codesisss51650.2020.9244028 ◽

2020 ◽

Author(s):

Jinyu Zhan ◽

Junting Wu ◽

Wei Jiang ◽

Ying Li ◽

Jianping Zhu

Keyword(s):

Work In Progress

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A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) ◽

10.1109/codesisss51650.2020.9244038 ◽

2020 ◽

Author(s):

Alessio Colucci ◽

Alberto Marchisio ◽

Beatrice Bussolino ◽

Voitech Mrazek ◽

Maurizio Martina ◽

...

Keyword(s):

Deep Learning ◽

Design Space Exploration ◽

Design Space ◽

Space Exploration ◽

Work In Progress

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An Energy-aware Spiking Neural Network Hardware Mapping based on Particle Swarm Optimization and Genetic Algorithm

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) ◽

10.1109/codesisss51650.2020.9244037 ◽

2020 ◽

Author(s):

Junxiu Liu ◽

Xingyue Huang ◽

Dong Jiang ◽

Yuling Luo

Keyword(s):

Neural Network ◽

Genetic Algorithm ◽

Particle Swarm Optimization ◽

Particle Swarm ◽

Spiking Neural Network ◽

Energy Aware ◽

Swarm Optimization ◽

Neural Network Hardware

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Model Stealing Defense with Hybrid Fuzzy Models: Work-in-Progress

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) ◽

10.1109/codesisss51650.2020.9244031 ◽

2020 ◽

Author(s):

Zicheng Gong ◽

Wei Jiang ◽

Jinyu Zhan ◽

Ziwei Song

Keyword(s):

Work In Progress ◽

Fuzzy Models

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Techniques for Design Analysis and Modification Based on ASAP Model: Work-in-Progress

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) ◽

10.1109/codesisss51650.2020.9244023 ◽

2020 ◽

Author(s):

Ke Du ◽

Stephane Domas ◽

Michel Lenczner

Keyword(s):

Design Analysis ◽

Work In Progress

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Proceedings of the 2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) ◽

10.1109/codesisss51650.2020.9244033 ◽

2020 ◽

Keyword(s):

System Synthesis ◽

International Conference

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WiderFrame: An Automatic Customization Framework for Building CNN Accelerators on FPGAs: Work-in-Progress

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) ◽

10.1109/codesisss51650.2020.9244024 ◽

2020 ◽

Author(s):

Lei Gong ◽

Chao Wang ◽

Xi Li ◽

Xuehai Zhou

Keyword(s):

Work In Progress

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2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

RePAiR: A Strategy for Reducing Peak Temperature while Maximising Accuracy of Approximate Real-Time Computing: Work-in-Progress

A New Hardware Trojan Design: Distinguishing Between Trigger Inputs and Functional Inputs Is Difficult: Work-in-Progress

Work-in-Progress: Enabling Edge-based Self-Navigation in Earthquake-Struck Zones

Accelerating Queries of MongoDB by an FPGA-based Storage Engine: Work-in-Progress

A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress

An Energy-aware Spiking Neural Network Hardware Mapping based on Particle Swarm Optimization and Genetic Algorithm

Model Stealing Defense with Hybrid Fuzzy Models: Work-in-Progress

Techniques for Design Analysis and Modification Based on ASAP Model: Work-in-Progress

Proceedings of the 2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)

WiderFrame: An Automatic Customization Framework for Building CNN Accelerators on FPGAs: Work-in-Progress

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2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

RePAiR: A Strategy for Reducing Peak Temperature while Maximising Accuracy of Approximate Real-Time Computing: Work-in-Progress

A New Hardware Trojan Design: Distinguishing Between Trigger Inputs and Functional Inputs Is Difficult: Work-in-Progress

Work-in-Progress: Enabling Edge-based Self-Navigation in Earthquake-Struck Zones

Accelerating Queries of MongoDB by an FPGA-based Storage Engine: Work-in-Progress

A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress

An Energy-aware Spiking Neural Network Hardware Mapping based on Particle Swarm Optimization and Genetic Algorithm

Model Stealing Defense with Hybrid Fuzzy Models: Work-in-Progress

Techniques for Design Analysis and Modification Based on ASAP Model: Work-in-Progress

Proceedings of the 2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)

WiderFrame: An Automatic Customization Framework for Building CNN Accelerators on FPGAs: Work-in-Progress

2020 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)
Latest Publications