Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02
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Minimizing concurrent test time in SoC's by balancing resource usage

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505323 ◽

2002 ◽

Cited By ~ 2

Author(s):

Dan Zhao ◽

Shambhu Upadhyaya ◽

Martin Margala

Keyword(s):

Test Time ◽

Resource Usage

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AQUASUN

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505339 ◽

2002 ◽

Author(s):

Michiel De Wilde ◽

Dirk Stroobandt ◽

Jan Van Campenhout

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Unified architecture level energy-efficiency metric

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505313 ◽

2002 ◽

Cited By ~ 8

Author(s):

Victor Zyuban

Keyword(s):

Energy Efficiency ◽

Level Energy

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A low power direct digital frequency synthesizer with 60 dBc spectral purity

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505342 ◽

2002 ◽

Cited By ~ 6

Author(s):

J. M.P. Langlois ◽

D. Al-Khalili

Keyword(s):

Low Power ◽

Frequency Synthesizer ◽

Spectral Purity ◽

Digital Frequency ◽

Direct Digital Frequency Synthesizer

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On the high-speed VLSI implementation of errors-and-erasures correcting reed-solomon decoders

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505326 ◽

2002 ◽

Cited By ~ 7

Author(s):

Tong Zhang ◽

Keshab K. Parhi

Keyword(s):

High Speed ◽

Vlsi Implementation

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Fast and accurate wire delay estimation for physical synthesis of large ASICs

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505314 ◽

2002 ◽

Cited By ~ 9

Author(s):

Ruchir Puri ◽

David S. Kung ◽

Anthony D. Drumm

Keyword(s):

Delay Estimation ◽

Physical Synthesis ◽

Wire Delay

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Variable-segment & variable-driver parallel regeneration techniques for RLC VLSI interconnects

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505332 ◽

2002 ◽

Cited By ~ 2

Author(s):

Falah R. Awwad ◽

Mohamed Nekili

Keyword(s):

Vlsi Interconnects ◽

Variable Segment

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Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505308 ◽

2002 ◽

Cited By ~ 2

Author(s):

Joel Grodstein ◽

Mike Gowan ◽

Roy Lane ◽

Brian Lilly ◽

Krishna Nagalla ◽

...

Keyword(s):

L2 Cache

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Design limitations in deep sub-0.1μm CMOS SRAM

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505327 ◽

2002 ◽

Author(s):

Robert K. Grube ◽

Qi Wang ◽

Sung-Mo Kang

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Term ordering problem on MDG

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02 ◽

10.1145/505306.505341 ◽

2002 ◽

Cited By ~ 1

Author(s):

Yi Feng ◽

Eduard Cerny

Keyword(s):

Term Ordering

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Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By ACM Press

Minimizing concurrent test time in SoC's by balancing resource usage

AQUASUN

Unified architecture level energy-efficiency metric

A low power direct digital frequency synthesizer with 60 dBc spectral purity

On the high-speed VLSI implementation of errors-and-erasures correcting reed-solomon decoders

Fast and accurate wire delay estimation for physical synthesis of large ASICs

Variable-segment & variable-driver parallel regeneration techniques for RLC VLSI interconnects

Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU

Design limitations in deep sub-0.1μm CMOS SRAM

Term ordering problem on MDG

Proceedings of the 12th ACM Great Lakes Symposium on VLSI - GLSVLSI '02
Latest Publications