wire delay
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Author(s):  
Suma Sannamani, Dr. Manjudevi

NUCA has become solution for wire delay problems, where wire delay problems increases on chip latency in multiprocessor system. Non uniform architecture is used for cache memory. Here cache is divided into tiles ,each tiled cache is accessed with different latency. Hence it is called non uniform. Access data defines search algorithm across architecture. This paper involves design of root tiles which accepts request from processor and forward request to child cache tiles. Here we have used Xilinx simulation tool to analyze the performance.


2018 ◽  
Vol 14 (6) ◽  
pp. 700-707 ◽  
Author(s):  
Lars Nepper-Christensen ◽  
Jacob Lønborg ◽  
Dan Eik Høfsten ◽  
Kiril Aleksov Ahtarovski ◽  
Kasper Kyhl ◽  
...  
Keyword(s):  

2015 ◽  
Vol 39 (8) ◽  
pp. 807-815 ◽  
Author(s):  
Andreas Thor Winther ◽  
Wei Liu ◽  
Alberto Nannarelli ◽  
Sarma Vrudhula

VLSI Design ◽  
2014 ◽  
Vol 2014 ◽  
pp. 1-13
Author(s):  
Christopher Bailey ◽  
Brendan Mullane

Complexity in processor microarchitecture and the related issues of power density, hot spots and wire delay, are seen to be a major concern for design migration into low nanometer technologies of the future. This paper evaluates the hardware cost of an alternative to register-file organization, the superscalar stack issue array (SSIA). We believe this is the first such reported study using discrete stack elements. Several possible implementations are evaluated, using a 90 nm standard cell library as a reference model, yielding delay data and FO4 metrics. The evaluation, including reference to ASIC layout, RC extraction, and timing simulation, suggests a 4-wide issue rate of at least four Giga-ops/sec at 90 nm and opportunities for twofold future improvement by using more advanced design approaches.


Author(s):  
Mohamad Hairol Jabbar ◽  
Dominique Houzet ◽  
Omar Hammami
Keyword(s):  
3D Ic ◽  

2013 ◽  
Vol 401-403 ◽  
pp. 8-12 ◽  
Author(s):  
Guo Yong Wang ◽  
Wen Li Wang ◽  
Xiao Hui Li ◽  
Feng Zhu

By Studying the Principle of Single Side-Band Mixing, a New Method Based on Quadrature Phase Shift for Generating High-<em></em>Precision Offset Frequency was Proposed. Different Solutions of Precision Quadrature Phase Shift were Designed for Different Frequencies, Including Combining Analog Quadrature Splitter and Wire Delay for 10MHz, Combining Digital Phase Shift Module Using CPLD, Digital Delay Line Chip and Wire Delay for 10kHz. According to the Design Goal, the Design Parameters and Requirements of Narrow-Band Low-Loss Filter were Analyzed. Finally, an Offset Frequency Generator Whose Output Frequency is 9.99999MHz was Developed and an Experiment System is Constructed to Test the Performance of the High-Precision Offset Frequency Generator. According to the Experiment Results, the Following Conclusion can be Drawn that the Allan Deviation of the 9.99999MHz Offset Frequency Generator is 4.03e-13 which is close to the Frequency Stability of 10MHz Signal of Hydrogen Maser MHM-2010 of Sigma Tau Corporation. the High-Precision Offset Frequency Generator can be Used as a Common Source in Dual Mixer Time Difference and as a Reference Signal in Beat Frequency Method.


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