Design of a Fully Integrated VHF CP-PLL Frequency Synthesizer with an All-Digital Defect-Oriented Built-In Self-Test.

This paper presents the design of an on-chip charge pump phase-locked loop (CP-PLL) with a fully digital defect oriented built-in self-test (BIST) for very-high frequency (VHF) applications. The frequency synthesizer has a 40 to 100 MHz tuning range and uses a ring voltage-controlled oscillator for frequency synthesis. The PLL exhibits a phase noise of -132 dBc/Hz at 1 MHz and consumes 1.8 mW on a 3 V supply. The BIST implementation uses fewer external input or output, is capable of efficient fault diagnosis, and is compact, posing a low area overhead. The integrated circuit design was realized in the AMI 0.6µ complementary metal oxide-semiconductor process.

Stabilization of the backward wave oscillator frequency for operation with high quality resonators

This article describes the performance of a backward wave oscillator, stabilized with phase locked loop. The backward wave oscillator is locked to the frequency of a direct digital synthesizer using an automatic phase locked loop. The direct digital synthesizer is playing the role of tuning part in the suggested frequency synthesizer. Mathematical evaluations of the stability, phase noise and locking speed of the suggested frequency synthesizer are obtained. The optimization technique of frequency synthesizers parameters is presented. This allows to get the maximum response speed and the lowest phase noise and level of spurious with fine tuning (less than 1 Hz). It was shown that the order and type of loop filter in the frequency synthesizer will affect simultaneously the response speed, phase noise and spurious level. The results of this paper shows that the frequency synthesizer can be used in small samples properties measurement using open resonators.