2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781479969050

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Optimizing Memory Locality Using a Locality-Aware Page Table

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing ◽

10.1109/sbac-pad.2014.22 ◽

2014 ◽

Cited By ~ 3

Author(s):

Eduardo H.M. Cruz ◽

Matthias Diener ◽

Marco A.Z. Alves ◽

Laercio L. Pilla ◽

Philippe O.A. Navaux

Keyword(s):

Page Table ◽

Memory Locality

Download Full-text

Runtime Support for Adaptive Spatial Partitioning and Inter-Kernel Communication on GPUs

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing ◽

10.1109/sbac-pad.2014.43 ◽

2014 ◽

Cited By ~ 10

Author(s):

Yash Ukidave ◽

Charu Kalra ◽

David Kaeli ◽

Perhaad Mistry ◽

Dana Schaa

Keyword(s):

Spatial Partitioning ◽

Runtime Support

Download Full-text

Cloud-based OpenMP Parallelization Using a MapReduce Runtime

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing ◽

10.1109/sbac-pad.2014.46 ◽

2014 ◽

Cited By ~ 8

Author(s):

Rodolfo Wottrich ◽

Rodolfo Azevedo ◽

Guido Araujo

Download Full-text

Flying Memcache: Lessons Learned from Different Acceleration Strategies

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing ◽

10.1109/sbac-pad.2014.17 ◽

2014 ◽

Cited By ~ 1

Author(s):

Dimitris Deyannis ◽

Lazaros Koromilas ◽

Giorgos Vasiliadis ◽

Elias Athanasopoulos ◽

Sotiris Ioannidis

Keyword(s):

Lessons Learned

Download Full-text

Scalability Analysis of Signatures in Transactional Memory Systems

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing ◽

10.1109/sbac-pad.2014.40 ◽

2014 ◽

Author(s):

Ricardo Quislant ◽

Eladio Gutierrez ◽

Oscar Plata

Keyword(s):

Transactional Memory ◽

Memory Systems ◽

Scalability Analysis

Download Full-text

Predicting GPU Performance from CPU Runs Using Machine Learning

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing ◽

10.1109/sbac-pad.2014.30 ◽

2014 ◽

Cited By ~ 19

Author(s):

Ioana Baldini ◽

Stephen J. Fink ◽

Erik Altman

Keyword(s):

Machine Learning

Download Full-text

Leveraging OmpSs to Exploit Hardware Accelerators

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing ◽

10.1109/sbac-pad.2014.26 ◽

2014 ◽

Cited By ~ 8

Author(s):

Florentino Sainz ◽

Sergi Mateo ◽

Vicenc Beltran ◽

Jose L. Bosque ◽

Xavier Martorell ◽

...

Keyword(s):

Hardware Accelerators

Download Full-text

Message from the General Chairs

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing ◽

10.1109/sbac-pad.2014.4 ◽

2014 ◽

Download Full-text

Hardware/Software Helper Thread Prefetching on Heterogeneous Many Cores

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing ◽

10.1109/sbac-pad.2014.39 ◽

2014 ◽

Author(s):

Bharath Narasimha Swamy ◽

Alain Ketterlin ◽

Andre Seznec

Download Full-text

Compact Hash Tables for High-Performance Traffic Classification on Multi-core Processors

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing ◽

10.1109/sbac-pad.2014.32 ◽

2014 ◽

Cited By ~ 5

Author(s):

Yun R. Qu ◽

Viktor K. Prasanna

Keyword(s):

High Performance ◽

Traffic Classification ◽

Hash Tables

Download Full-text

2014 IEEE 26th International Symposium on Computer Architecture and High Performance ComputingLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Optimizing Memory Locality Using a Locality-Aware Page Table

Runtime Support for Adaptive Spatial Partitioning and Inter-Kernel Communication on GPUs

Cloud-based OpenMP Parallelization Using a MapReduce Runtime

Flying Memcache: Lessons Learned from Different Acceleration Strategies

Scalability Analysis of Signatures in Transactional Memory Systems

Predicting GPU Performance from CPU Runs Using Machine Learning

Leveraging OmpSs to Exploit Hardware Accelerators

Message from the General Chairs

Hardware/Software Helper Thread Prefetching on Heterogeneous Many Cores

Compact Hash Tables for High-Performance Traffic Classification on Multi-core Processors

2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing
Latest Publications