2012 VIII Southern Conference on Programmable Logic
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9781467301862, 9781467301848, 9781467301855

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Committees

2012 VIII Southern Conference on Programmable Logic ◽

10.1109/spl.2012.6211808 ◽

2012 ◽

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An open-source framework for heterogeneous MPSoC generation

2012 VIII Southern Conference on Programmable Logic ◽

10.1109/spl.2012.6211767 ◽

2012 ◽

Cited By ~ 3

Author(s):

E. W. Wachter ◽

C. Lucas ◽

E. A. Carara ◽

F. G. Moraes

Keyword(s):

Open Source ◽

Open Source Framework ◽

Heterogeneous Mpsoc

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Very high throughput FPGA design for vertical rotational transform of HEVC emergent video coding standard

2012 VIII Southern Conference on Programmable Logic ◽

10.1109/spl.2012.6211797 ◽

2012 ◽

Author(s):

H. Vianna ◽

V. Andersson ◽

G. Sanchez ◽

L. Agostini

Keyword(s):

Video Coding ◽

High Throughput ◽

Fpga Design ◽

Rotational Transform ◽

Very High

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Revisiting Atari 2600 on an FPGA

2012 VIII Southern Conference on Programmable Logic ◽

10.1109/spl.2012.6211805 ◽

2012 ◽

Author(s):

G. Flach ◽

C. Conceicao ◽

M. Johann ◽

R. Reis

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An MPEG-4 AAC decoder FPGA implementation for the Brazilian digital television

2012 VIII Southern Conference on Programmable Logic ◽

10.1109/spl.2012.6211796 ◽

2012 ◽

Cited By ~ 4

Author(s):

A. Renner ◽

A. A. Susin

Keyword(s):

Fpga Implementation ◽

Digital Television

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Optimized 16×16 discrete cosine transform architecture for homogeneity-based H.264/AVC intra mode decision

2012 VIII Southern Conference on Programmable Logic ◽

10.1109/spl.2012.6211789 ◽

2012 ◽

Cited By ~ 1

Author(s):

R. Souza ◽

Leomar da Rosa ◽

L. Agostini ◽

R. Porto

Keyword(s):

Discrete Cosine Transform ◽

Mode Decision ◽

Cosine Transform ◽

Intra Mode Decision

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Real time QFHD motion estimation architecture for DMPDS algorithm

2012 VIII Southern Conference on Programmable Logic ◽

10.1109/spl.2012.6211765 ◽

2012 ◽

Author(s):

G. Sanchez ◽

L. Agostini ◽

M. Porto ◽

S. Bampi

Keyword(s):

Motion Estimation ◽

Real Time

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Memory bandwidth reduction in video coding systems through context adaptive lossless reference frame compression

2012 VIII Southern Conference on Programmable Logic ◽

10.1109/spl.2012.6211791 ◽

2012 ◽

Cited By ~ 5

Author(s):

D. Silveira ◽

G. Sanchez ◽

M. Grellert ◽

V. Possani ◽

L. Agostini

Keyword(s):

Video Coding ◽

Reference Frame ◽

Memory Bandwidth ◽

Bandwidth Reduction ◽

Coding Systems

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Low cost and high throughput multiplierless design of a 16 point 1-D DCT of the new HEVC video coding standard

2012 VIII Southern Conference on Programmable Logic ◽

10.1109/spl.2012.6211786 ◽

2012 ◽

Cited By ~ 17

Author(s):

R. Jeske ◽

J. C. de Souza ◽

G. Wrege ◽

R. Conceicao ◽

M. Grellert ◽

...

Keyword(s):

Video Coding ◽

High Throughput ◽

Low Cost ◽

Multiplierless Design

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SPL 2012 VIII Southern Programmable Logic Conference [Copyright notice]

2012 VIII Southern Conference on Programmable Logic ◽

10.1109/spl.2012.6211809 ◽

2012 ◽

Keyword(s):

Programmable Logic ◽

Download Full-text

2012 VIII Southern Conference on Programmable LogicLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Committees

An open-source framework for heterogeneous MPSoC generation

Very high throughput FPGA design for vertical rotational transform of HEVC emergent video coding standard

Revisiting Atari 2600 on an FPGA

An MPEG-4 AAC decoder FPGA implementation for the Brazilian digital television

Optimized 16×16 discrete cosine transform architecture for homogeneity-based H.264/AVC intra mode decision

Real time QFHD motion estimation architecture for DMPDS algorithm

Memory bandwidth reduction in video coding systems through context adaptive lossless reference frame compression

Low cost and high throughput multiplierless design of a 16 point 1-D DCT of the new HEVC video coding standard

SPL 2012 VIII Southern Programmable Logic Conference [Copyright notice]

2012 VIII Southern Conference on Programmable Logic
Latest Publications