2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781479920792, 9781479920785

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A low complexity H.264/AVC 4×4 intra prediction architecture with macroblock/block reordering

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig.2013.6732306 ◽

2013 ◽

Cited By ~ 3

Author(s):

Milica Orlandic ◽

Kjetil Svarstad

Keyword(s):

Low Complexity ◽

Intra Prediction

Download Full-text

Technical demonstrations session

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig.2013.6732256 ◽

2013 ◽

Download Full-text

MCMA: A modular processing elements array based low-power coarse-grained reconfigurable accelerator

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig.2013.6732308 ◽

2013 ◽

Author(s):

Remi Chaintreuil ◽

Rie Uno ◽

Hideharu Amano

Keyword(s):

Low Power ◽

Coarse Grained ◽

Processing Elements

Download Full-text

Design of low area-overhead ring oscillator PUF with large challenge space

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig.2013.6732277 ◽

2013 ◽

Cited By ~ 7

Author(s):

Durga Prasad Sahoo ◽

Debdeep Mukhopadhyay ◽

Rajat Subhra Chakraborty

Keyword(s):

Ring Oscillator ◽

Low Area ◽

Area Overhead

Download Full-text

Distributed execution of transmural electrophysiological imaging with CPU, GPU, and FPGA

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig.2013.6732278 ◽

2013 ◽

Cited By ~ 3

Author(s):

Sam Skalicky ◽

Sonia Lopez ◽

Marcin Lukowiak

Keyword(s):

Distributed Execution

Download Full-text

PolyNOC — A polymorphic thread simulator for NoC communication based embedded systems

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig.2013.6732320 ◽

2013 ◽

Author(s):

Swamy D. Ponpandi ◽

Zhang Zhang ◽

Akhilesh Tyagi

Keyword(s):

Embedded Systems

Download Full-text

A reconfigurable architecture for searching optimal software code to implement block cipher permutation matrices

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig.2013.6732263 ◽

2013 ◽

Cited By ~ 2

Author(s):

Elif Bilge Kavun ◽

Gregor Leander ◽

Tolga Yalcind

Keyword(s):

Block Cipher ◽

Reconfigurable Architecture ◽

Permutation Matrices ◽

Software Code

Download Full-text

A fault attack on a hardware-based implementation of the secure hash algorithm SHA-512

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig.2013.6732292 ◽

2013 ◽

Author(s):

Abdulhadi Shoufan

Keyword(s):

Fault Attack ◽

Hash Algorithm ◽

Secure Hash Algorithm

Download Full-text

Keynote 3 — Extreme scale challenges: Can reconfigurable computing come to the rescue?

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig.2013.6732255 ◽

2013 ◽

Author(s):

Maya Gokhale

Keyword(s):

Reconfigurable Computing ◽

Extreme Scale ◽

Scale Challenges

Download Full-text

Countermeasures against EM analysis for a secured FPGA-based AES implementation

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig.2013.6732274 ◽

2013 ◽

Cited By ~ 6

Author(s):

P. Maistri ◽

S. Tiran ◽

P. Maurine ◽

I. Koren ◽

R. Leveugle

Download Full-text

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

A low complexity H.264/AVC 4×4 intra prediction architecture with macroblock/block reordering

Technical demonstrations session

MCMA: A modular processing elements array based low-power coarse-grained reconfigurable accelerator

Design of low area-overhead ring oscillator PUF with large challenge space

Distributed execution of transmural electrophysiological imaging with CPU, GPU, and FPGA

PolyNOC — A polymorphic thread simulator for NoC communication based embedded systems

A reconfigurable architecture for searching optimal software code to implement block cipher permutation matrices

A fault attack on a hardware-based implementation of the secure hash algorithm SHA-512

Keynote 3 — Extreme scale challenges: Can reconfigurable computing come to the rescue?

Countermeasures against EM analysis for a secured FPGA-based AES implementation

2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig)
Latest Publications