Performance Analysis of Ring Oscillators and Current-Starved VCO in 45-nm CMOS Technology

This paper presents a relative study among two Ring oscillators architecture (CMOS, NMOS) and current-starved Voltage-controlled oscillator (CS-VCO) on the basis of different parameters like power dissipation ,phase noise etc. All the design has been done in 45- nm CMOS technology node and 2.3 GHz Centre frequency have been taken for the comparison because of their applications in AV Devices and Radio control. An inherent idea of the given performance parameters has been realize by thecomparative study. The comparative data shows that NMOS based Ring oscillator is good option in terms of the phase noise performance. In this study NMOS Ring Oscillator have attain a phase noise -97.94 dBc/Hz at 1 MHz offset frequency from 2.3 GHz center frequency. The related data also shows that CMOS Ring oscillator is the best option in terms of power consumption. In this work CMOS Ring oscillator evacuatea power of 1.73 mW which is quite low. Keywords: Voltage controlled oscillator (VCO), phase noise, power consumption, Complementary metal-oxide-semiconductor (CMOS), Current Starved Voltage-Controlled Oscillator (CS- VCO), Pull up network (PUN), Pull down network (PDN)

Review of Physically Unclonable Functions (PUFs): Structures, Models, and Algorithms

Physically unclonable functions (PUFs) are now an essential component for strengthening the security of Internet of Things (IoT) edge devices. These devices are an important component in many infrastructure systems such as telehealth, commerce, industry, etc. Traditionally these devices are the weakest link in the security of the system since they have limited storage, processing, and energy resources. Furthermore they are located in unsecured environments and could easily be the target of tampering and various types of attacks. We review in this work the structure of most salient types of PUF systems such as static RAM static random access memory (SRAM), ring oscillator (RO), arbiter PUFs, coating PUFs and dynamic RAM dynamic random access memory (DRAM). We discuss statistical models for the five most common types of PUFs and identify the main parameters defining their performance. We review some of the most recent algorithms that can be used to provide stable authentication and secret key generation without having to use helper data or secure sketch algorithms. Finally we provide results showing the performance of these devices and how they depend on the authentication algorithm used and the main system parameters.

A Simple Method of Transistor-Level SPICE-Models Parameters Fitting of Integrated Circuits in a Temperature Range

Today, both macromodels and transistor-level models of semiconductor integrated circuits are available. However, most models don’t take into account the influence of destabilizing effects. Thus, the tasks of developing new models and fitting the parameters of existing ones are very relevant. In this work, the authors introduced an assumption about the existence of a correlation relationship between all the parameters of integrated circuits’ transistor-level models and offered a way to fit these parameters. The experience of fitting the model’s parameters of the integrated circuit 1564LE1 EP was presented. To simplify this task, all parameters were altered by the same relative deviation. To check the assumption made, the authors carried out full-scale experiment, in which the frequency of the self-oscillation of the ring oscillator based on the 1564LE1 EP was measured in the temperature range. The simulation of the ring oscillator has been made using a SPICE-simulator. The dependences of the self-oscillation frequency on temperature, obtained as a result of simulation and as a result of experiment, were compared before and after fitting the parameters of the integrated circuit model. Also, the waveforms of the ring oscillator based on the original and fitted model were compared. The analysis of the obtained dependences of the frequency of oscillations, the signal shape before and after the model fitting, the link to the text of the fitted model has been provided. The results obtained show the possibility of using the introduced assumption to fit the parameters of the transistor-level integrated circuit model.

Fully roll-to-roll gravure printed 4-bit code generator based on p-type SWCNT thin-film transistors

Current Si-based technologies have reached their intrinsic limits in meeting the demands of flexible electronics where free-form factors and low cost are critical for successful applications. For this reason, roll-to-roll (R2R) gravure printing has been considered a way to achieve the free-form factor and the low cost. However, the R2R gravure systems (servomechanism, electronic ink, printing process, and device design) could not integrate a number of thin-film transistors (TFTs) with small threshold voltage (Vth) variations. Therefore, we designed a 4-bit code generator by combining one ring oscillator, 6 NAND gates, and one OR gate based on 37 p-type single-walled carbon nanotube (SWCNT) TFTs as a concept devices to test the R2R gravure system. First, ring oscillators with different physical dimensions were printed on a poly (ethylene terephthalate) (PET) roll using the R2R gravure. Then, we extracted important factors (channel length, channel width, and SWCNT network density) to optimize the Vth variation and demonstrated a 4-bit code generator integrated with 37 p-type TFTs. This work will be further extended in the near future to develop R2R gravure printed Near-Field Communication labels for smart packaging.