Proceedings of the international workshop on System-level interconnect prediction - SLIP'06
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Constant impedance scaling paradigm for interconnect synthesis

Proceedings of the international workshop on System-level interconnect prediction - SLIP'06 ◽

10.1145/1117278.1117298 ◽

2006 ◽

Author(s):

J. Balachandran ◽

S. Brebels ◽

G. Carchon ◽

M. Kuijk ◽

W. De Raedt ◽

...

Keyword(s):

Impedance Scaling ◽

Constant Impedance

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Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture

Proceedings of the international workshop on System-level interconnect prediction - SLIP'06 ◽

10.1145/1117278.1117294 ◽

2006 ◽

Author(s):

Jin Guo ◽

Antonis Papanikolaou ◽

Pol Marchal ◽

Francky Catthoor

Keyword(s):

Physical Design ◽

On Chip ◽

Bus Architecture

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Difficulty of predicting interconnect delay in a timing driven FPGA CAD flow

Proceedings of the international workshop on System-level interconnect prediction - SLIP'06 ◽

10.1145/1117278.1117280 ◽

2006 ◽

Author(s):

Valavan Manohararajah ◽

Gordon R. Chiu ◽

Deshanand P. Singh ◽

Stephen D. Brown

Keyword(s):

Interconnect Delay

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An overview of on-chip interconnect variation

Proceedings of the international workshop on System-level interconnect prediction - SLIP'06 ◽

10.1145/1117278.1117284 ◽

2006 ◽

Author(s):

Lou Scheffer

Keyword(s):

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Modeling and analysis of the system bus latency on the SoC platform

Proceedings of the international workshop on System-level interconnect prediction - SLIP'06 ◽

10.1145/1117278.1117293 ◽

2006 ◽

Author(s):

Young-Sin Cho ◽

Eun-Ju Choi ◽

Kyoung-Rok Cho

Keyword(s):

Modeling And Analysis

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Congestion modeling for reconfigurable inter-processor networks

Proceedings of the international workshop on System-level interconnect prediction - SLIP'06 ◽

10.1145/1117278.1117292 ◽

2006 ◽

Author(s):

W. Heirman ◽

J. Dambre ◽

J. Van Campenhout

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Statistical crosstalk aggressor alignment aware interconnect delay calculation

Proceedings of the international workshop on System-level interconnect prediction - SLIP'06 ◽

10.1145/1117278.1117297 ◽

2006 ◽

Author(s):

Andrew B. Kahng ◽

Bao Liu ◽

Xu Xu

Keyword(s):

Interconnect Delay

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The routability of multiprocessor network topologies in FPGAs

Proceedings of the international workshop on System-level interconnect prediction - SLIP'06 ◽

10.1145/1117278.1117290 ◽

2006 ◽

Author(s):

Manuel Saldaña ◽

Lesley Shannon ◽

Paul Chow

Keyword(s):

Network Topologies

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Statistical analysis and optimization in the presence of gate and interconnect delay variations

Proceedings of the international workshop on System-level interconnect prediction - SLIP'06 ◽

10.1145/1117278.1117287 ◽

2006 ◽

Author(s):

Chandu Visweswariah

Keyword(s):

Statistical Analysis ◽

Interconnect Delay ◽

Delay Variations

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Generation of design guarantees for interconnect matching

Proceedings of the international workshop on System-level interconnect prediction - SLIP'06 ◽

10.1145/1117278.1117285 ◽

2006 ◽

Author(s):

Andrew B. Kahng ◽

Rasit Onur Topaloglu

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