Reconfigurable Preexecution in Data Parallel Applications on Multicore Systems

2012 ◽  
pp. 29-38
Author(s):  
Ákos Dudás ◽  
Sándor Juhász
Keyword(s):  
Parallel Applications ◽  
Multicore Systems ◽  
Data Parallel

scholarly journals Static Mapping with Dynamic Switching of Multiple Data-Parallel Applications on Embedded Many-Core SoCs

2014 ◽  
Vol E97.D (11) ◽  
pp. 2827-2834 ◽  
Author(s):  
Ittetsu TANIGUCHI ◽  
Junya KAIDA ◽  
Takuji HIEDA ◽  
Yuko HARA-AZUMI ◽  
Hiroyuki TOMIYAMA
Keyword(s):  
Parallel Applications ◽  
Data Parallel ◽  
Dynamic Switching ◽  
Multiple Data ◽  
Many Core

scholarly journals Multi-Softcore Architecture on FPGA

2014 ◽  
Vol 2014 ◽  
pp. 1-13 ◽  
Author(s):  
Mouna Baklouti ◽  
Mohamed Abid
Keyword(s):  
High Performance ◽  
Design Methodology ◽  
Matrix Multiplication ◽  
Rapid Prototype ◽  
General Purpose ◽  
Parallel Applications ◽  
Multicore Systems ◽  
Processor Core ◽  
Nios Ii ◽  
Wide Range

To meet the high performance demands of embedded multimedia applications, embedded systems are integrating multiple processing units. However, they are mostly based on custom-logic design methodology. Designing parallel multicore systems using available standards intellectual properties yet maintaining high performance is also a challenging issue. Softcore processors and field programmable gate arrays (FPGAs) are a cheap and fast option to develop and test such systems. This paper describes a FPGA-based design methodology to implement a rapid prototype of parametric multicore systems. A study of the viability of making the SoC using the NIOS II soft-processor core from Altera is also presented. The NIOS II features a general-purpose RISC CPU architecture designed to address a wide range of applications. The performance of the implemented architecture is discussed, and also some parallel applications are used for testing speedup and efficiency of the system. Experimental results demonstrate the performance of the proposed multicore system, which achieves better speedup than the GPU (29.5% faster for the FIR filter and 23.6% faster for the matrix-matrix multiplication).

VLADYMIR—a C++ matrix library for data-parallel applications

2004 ◽  
Vol 20 (6) ◽  
pp. 1023-1039 ◽  
Author(s):  
Jonas Lätt ◽  
Bastien Chopard
Keyword(s):  
Parallel Applications ◽  
Data Parallel

scholarly journals Workflow-Based Data Parallel Applications on the EGEE Production Grid Infrastructure

2008 ◽  
Vol 6 (4) ◽  
pp. 369-383 ◽  
Author(s):  
Johan Montagnat ◽  
Tristan Glatard ◽  
Isabel Campos Plasencia ◽  
Francisco Castejón ◽  
Xavier Pennec ◽  
...  
Keyword(s):  
Parallel Applications ◽  
Grid Infrastructure ◽  
Data Parallel
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