Molecular Dynamics Performance Evaluation with Modern Computer Architecture

2020 ◽  
pp. 322-329
Author(s):  
Emanuele Breuza ◽  
Giorgio Colombo ◽  
Daniele Gregori ◽  
Filippo Marchetti
Keyword(s):  
Molecular Dynamics ◽  
Performance Evaluation ◽  
Computer Architecture ◽  
Modern Computer

scholarly journals SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput

2020 ◽  
Author(s):  
Rotem Ben-Hur ◽  
Ronny Ronen ◽  
Ameer Haj-Ali ◽  
Debjyoti Bhattacharjee ◽  
Adi Eliahu ◽  
...  
Keyword(s):  
Computer Architecture ◽  
Data Transfer ◽  
Logic Function ◽  
Logical Function ◽  
Single Row ◽  
Area Efficiency ◽  
Modern Computer ◽  
Multiple Data ◽  
Memory Mapping ◽  
Logic Operations

In-memory processing can dramatically improve the latency and energy consumption of computing systems by minimizing the data transfer between the memory and the processor. Efficient execution of processing operations within the memory is therefore a highly motivated objective in modern computer architecture. This paper presents a novel automatic framework for efficient implementation of arbitrary combinational logic functions within a memristive memory. Using tools from logic design, graph theory and compiler register allocation technology, we developed SIMPLER (Synthesis and In-memory MaPping of Logic Execution in a single Row), a tool that optimizes the execution of in-memory logic operations in terms of throughput and area. Given a logical function, SIMPLER automatically generates a sequence of atomic Memristor-Aided loGIC (MAGIC) NOR operations and efficiently locates them within a single size-limited memory row, reusing cells to save area when needed. This approach fully exploits the parallelism offered by the MAGIC NOR gates. It allows multiple instances of the logic function to be performed concurrently, each compressed into a single row of the memory. This virtue makes SIMPLER an attractive candidate for designing in-memory Single Instruction, Multiple Data (SIMD) operations. Compared to previous work (that optimizes latency rather than throughput for a single function), SIMPLER achieves an average throughput improvement of 435×. When previous tools are parallelized similarly to SIMPLER, SIMPLER achieves higher throughput of at least 5×, with 23× improvement in area and 20× improvement in area efficiency. These improvements more than fully compensate for the increase (up to 17% on average) in latency.

scholarly journals SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput

2020 ◽  
Author(s):  
Rotem Ben-Hur ◽  
Ronny Ronen ◽  
Ameer Haj-Ali ◽  
Debjyoti Bhattacharjee ◽  
Adi Eliahu ◽  
...  
Keyword(s):  
Computer Architecture ◽  
Data Transfer ◽  
Logic Function ◽  
Logical Function ◽  
Single Row ◽  
Area Efficiency ◽  
Modern Computer ◽  
Multiple Data ◽  
Memory Mapping ◽  
Logic Operations

In-memory processing can dramatically improve the latency and energy consumption of computing systems by minimizing the data transfer between the memory and the processor. Efficient execution of processing operations within the memory is therefore a highly motivated objective in modern computer architecture. This paper presents a novel automatic framework for efficient implementation of arbitrary combinational logic functions within a memristive memory. Using tools from logic design, graph theory and compiler register allocation technology, we developed SIMPLER (Synthesis and In-memory MaPping of Logic Execution in a single Row), a tool that optimizes the execution of in-memory logic operations in terms of throughput and area. Given a logical function, SIMPLER automatically generates a sequence of atomic Memristor-Aided loGIC (MAGIC) NOR operations and efficiently locates them within a single size-limited memory row, reusing cells to save area when needed. This approach fully exploits the parallelism offered by the MAGIC NOR gates. It allows multiple instances of the logic function to be performed concurrently, each compressed into a single row of the memory. This virtue makes SIMPLER an attractive candidate for designing in-memory Single Instruction, Multiple Data (SIMD) operations. Compared to previous work (that optimizes latency rather than throughput for a single function), SIMPLER achieves an average throughput improvement of 435×. When previous tools are parallelized similarly to SIMPLER, SIMPLER achieves higher throughput of at least 5×, with 23× improvement in area and 20× improvement in area efficiency. These improvements more than fully compensate for the increase (up to 17% on average) in latency.

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