Leakage Power Reduction of Instruction Cache Based on Tag Prediction and Drowsy Cache

Lecture Notes in Electrical Engineering - Computer Engineering and Networking ◽

10.1007/978-3-319-01766-2_130 ◽

2013 ◽

pp. 1143-1151

Author(s):

Wei Li ◽

Jianqing Xiao

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Instruction Cache ◽

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An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors

Advances in Computer Systems Architecture - Lecture Notes in Computer Science ◽

10.1007/11859802_62 ◽

2006 ◽

pp. 588-594 ◽

Author(s):

Chengyi Zhang ◽

Hongwei Zhou ◽

Minxuan Zhang ◽

Zuocheng Xing

Keyword(s):

Reduction Method ◽

Deep Submicron ◽

Power Reduction ◽

Leakage Power ◽

Instruction Cache

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LEAKAGE POWER REDUCTION USING MULTI MODAL DRIVEN HIERARCHICAL POWER MODE SWITCHES

i-manager s Journal on Circuits and Systems ◽

10.26634/jcir.6.2.14291 ◽

2018 ◽

Vol 6 (2) ◽

pp. 1

Author(s):

SEKHAR REDDY M. CHANDRA ◽

REDDY P. RAMANA ◽

◽

Keyword(s):

Power Reduction ◽

Leakage Power ◽

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Effect of leakage power reduction techniques on combinational circuits

2015 Online International Conference on Green Engineering and Technologies (IC-GET) ◽

10.1109/get.2015.7453862 ◽

2015 ◽

Author(s):

M. Manoranjani ◽

T. Ravi ◽

R. Ramya

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Combinational Circuits ◽

Reduction Techniques

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Exploring the limits of leakage power reduction in caches

ACM Transactions on Architecture and Code Optimization ◽

10.1145/1089008.1089009 ◽

2005 ◽

Vol 2 (3) ◽

pp. 221-246 ◽

Author(s):

Yan Meng ◽

Timothy Sherwood ◽

Ryan Kastner

Keyword(s):

Power Reduction ◽

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Leakage power reduction in CMOS modulo4 adder and modulo4 multiplier in sub-micron technology

International Conference on Sustainable Energy and Intelligent Systems (SEISCON 2011) ◽

10.1049/cp.2011.0430 ◽

2011 ◽

Author(s):

M.J. Rani ◽

S. Malarkkan

Keyword(s):

Power Reduction ◽

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Fine-Grain Leakage Power Reduction Method for m-out-of-n Encoded Circuits Using Multi-threshold-Voltage Transistors

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.11 ◽

2009 ◽

Author(s):

Masashi Imai ◽

Kouei Takada ◽

Takashi Nanya

Keyword(s):

Threshold Voltage ◽

Reduction Method ◽

Power Reduction ◽

Leakage Power ◽

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Robust SAT-Based Search Algorithm for Leakage Power Reduction

Lecture Notes in Computer Science - Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/3-540-45716-x_17 ◽

2002 ◽

pp. 167-177 ◽

Author(s):

Fadi A. Aloul ◽

Soha Hassoun ◽

Karem A. Sakallah ◽

David Blaauw

Keyword(s):

Search Algorithm ◽

Power Reduction ◽

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Power Reduction of a Set-Associative Instruction Cache Using a Dynamic Early Tag Lookup

10.23919/date51398.2021.9474191 ◽

2021 ◽

Author(s):

Chun-Chang Yu ◽

Yu Hen Hu ◽

Yi-Chang Lu ◽

Charlie Chung-Ping Chen

Keyword(s):

Power Reduction ◽

Instruction Cache

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Leakage Power Reduction in Deep Submicron VLSI Circuits Using Delay-Based Power Gating

National Academy Science Letters ◽

10.1007/s40009-019-00848-4 ◽

2019 ◽

Vol 43 (3) ◽

pp. 229-232 ◽

Author(s):

T. Thamaraimanalan ◽

P. Sampath

Keyword(s):

Deep Submicron ◽

Power Reduction ◽

Leakage Power ◽

Vlsi Circuits ◽

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Run-time demand estimation and modulation of on-chip decaps at system level for leakage power reduction in multicore chips

Integration ◽

10.1016/j.vlsi.2018.01.009 ◽

2019 ◽

Vol 65 ◽

pp. 322-330 ◽

Author(s):

Leilei Wang ◽

Cheng Zhuo ◽

Pingqiang Zhou

Keyword(s):

Demand Estimation ◽

Power Reduction ◽

Leakage Power ◽

System Level ◽

Run Time ◽

On Chip ◽

Multicore Chips

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