Toward a Standard Benchmark Format and Suite for Floating-Point Analysis

2017 ◽  
pp. 63-77 ◽  
Author(s):  
Nasrine Damouche ◽  
Matthieu Martel ◽  
Pavel Panchekha ◽  
Chen Qiu ◽  
Alexander Sanchez-Stern ◽  
...  
Keyword(s):  
Floating Point ◽  
Point Analysis

point-Analysis Using the Extrapolation Method in the Analytical Electron microscope

1990 ◽  
Vol 48 (2) ◽  
pp. 430-431
Author(s):  
Zenji Horita ◽  
Ryuzo Nishimachi ◽  
Takeshi Sano ◽  
Minoru Nemoto
Keyword(s):  
Electron Microscope ◽  
Extrapolation Method ◽  
X Ray ◽  
Absorption Correction ◽  
Point Analysis ◽  
Analytical Electron ◽  
Analytical Electron Microscope ◽  
Data Points ◽  
Identical Composition ◽  
X Ray Absorption

Absorption correction is often required in quantitative x-ray microanalysis of thin specimens using the analytical electron microscope. For such correction, it is convenient to use the extrapolation method[l] because the thickness, density and mass absorption coefficient are not necessary in the method. The characteristic x-ray intensities measured for the analysis are only requirement for the absorption correction. However, to achieve extrapolation, it is imperative to obtain data points more than two at different thicknesses in the identical composition. Thus, the method encounters difficulty in analyzing a region equivalent to beam size or the specimen with uniform thickness. The purpose of this study is to modify the method so that extrapolation becomes feasible in such limited conditions. Applicability of the new form is examined by using a standard sample and then it is applied to quantification of phases in a Ni-Al-W ternary alloy.The earlier equation for the extrapolation method was formulated based on the facts that the magnitude of x-ray absorption increases with increasing thickness and that the intensity of a characteristic x-ray exhibiting negligible absorption in the specimen is used as a measure of thickness.

CONVEYOR MODEL AND IMPLEMENTATION OF THE REAL NUMBERS ADDER ON FPGA

2020 ◽  
Vol 33 (109) ◽  
pp. 21-31
Author(s):  
І. Ya. Zeleneva ◽  
Т. V. Golub ◽  
T. S. Diachuk ◽  
А. Ye. Didenko
Keyword(s):  
Performance Improvement ◽  
Experimental Studies ◽  
Production Costs ◽  
Floating Point ◽  
Computing Device ◽  
Quartus Ii ◽  
Functional Blocks ◽  
Mental Testing ◽  
Processor Cores ◽  
Floating Point Numbers

The purpose of these studies is to develop an effective structure and internal functional blocks of a digital computing device – an adder, that performs addition and subtraction operations on floating- point numbers presented in IEEE Std 754TM-2008 format. To improve the characteristics of the adder, the circuit uses conveying, that is, division into levels, each of which performs a specific action on numbers. This allows you to perform addition / subtraction operations on several numbers at the same time, which increas- es the performance of calculations, and also makes the adder suitable for use in modern synchronous cir- cuits. Each block of the conveyor structure of the adder on FPGA is synthesized as a separate project of a digital functional unit, and thus, the overall task is divided into separate subtasks, which facilitates experi- mental testing and phased debugging of the entire device. Experimental studies were performed using EDA Quartus II. The developed circuit was modeled on FPGAs of the Stratix III and Cyclone III family. An ana- logue of the developed circuit was a functionally similar device from Altera. A comparative analysis is made and reasoned conclusions are drawn that the performance improvement is achieved due to the conveyor structure of the adder. Implementation of arithmetic over the floating-point numbers on programmable logic integrated cir- cuits, in particular on FPGA, has such advantages as flexibility of use and low production costs, and also provides the opportunity to solve problems for which there are no ready-made solutions in the form of stand- ard devices presented on the market. The developed adder has a wide scope, since most modern computing devices need to process floating-point numbers. The proposed conveyor model of the adder is quite simple to implement on the FPGA and can be an alternative to using built-in multipliers and processor cores in cases where the complex functionality of these devices is redundant for a specific task.

Floating Point Operations in PipeRench CGRA

2012 ◽  
Vol 1 (6) ◽  
pp. 67-68
Author(s):  
M. Somasekhar M. Somasekhar ◽  
Keyword(s):  
Floating Point

COST OF MILK PRODUCTION AND BREAK EVEN ANALYSIS OF MEMBER AND NON MEMBER OF DAIRY COOPERATIVE SOCIETY FOR MILCH ANIMALS (COW & BUFFALO) IN DISTRICT ETAWAH OF U.P.

2014 ◽  
Vol 2 (1) ◽  
pp. 30-37
Author(s):  
Ashish Chandra ◽  
Dr. A. K. Dubey ◽  
Dr. Sachin Kumar Srivastava
Keyword(s):  
Milk Production ◽  
Herd Size ◽  
Total Cost ◽  
Minimum Quantity ◽  
Cooperative Society ◽  
Point Analysis ◽  
Large Herd ◽  
Breakeven Point

This study covered 150 cooperative member milk producers and 150 non-member milk producers which were post- stratified into Landless, Marginal, small, medium and large herd size categories. Breakeven point is a point where no profit no loss status achieved where MR = MC. In this study breakeven point analysis was done to estimate the minimum quantity milk to be produced to cover the total cost on all categories (members and nonmembers) of households of milch animals (Cow and buffalo). And also in this study the researchers have find out the Total cost of milk production per liter for member and non member categories. This study is helpful to find out the total cost of milk production in all categories as well as members and nonmembers of dairy cooperative society are able to find out the breakeven point of the whole business.

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