Extracting Coarse-Grained Pipelined Parallelism Out of Sequential Applications for Parallel Processor Arrays

Architecture of Computing Systems – ARCS 2009 - Lecture Notes in Computer Science ◽

10.1007/978-3-642-00454-4_4 ◽

2009 ◽

pp. 4-15 ◽

Author(s):

Dimitris Syrivelis ◽

Spyros Lalis

Keyword(s):

Coarse Grained ◽

Parallel Processor ◽

Processor Arrays

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A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation

Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays - FPGA '09 ◽

10.1145/1508128.1508139 ◽

2009 ◽

Author(s):

David Barrie Thomas ◽

Lee Howes ◽

Wayne Luk

Keyword(s):

Random Number ◽

Random Number Generation ◽

Massively Parallel ◽

Parallel Processor ◽

Number Generation ◽

Processor Arrays ◽

Massively Parallel Processor

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High-Speed VLSI Architecture Based on Massively Parallel Processor Arrays for Real-Time Remote Sensing Applications

Applications of Digital Signal Processing ◽

10.5772/26496 ◽

2011 ◽

Author(s):

A. Castillo ◽

J. Estrada ◽

P. Perez ◽

S. Soto

Keyword(s):

Remote Sensing ◽

Real Time ◽

Vlsi Architecture ◽

Massively Parallel ◽

Parallel Processor ◽

Sensing Applications ◽

Processor Arrays ◽

Massively Parallel Processor ◽

Remote Sensing Applications

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Techniques for on-demand structural redundancy for massively parallel processor arrays

Journal of Systems Architecture ◽

10.1016/j.sysarc.2015.10.004 ◽

2015 ◽

Vol 61 (10) ◽

pp. 615-627 ◽

Author(s):

Vahid Lari ◽

Jürgen Teich ◽

Alexandru Tanase ◽

Michael Witterauf ◽

Faramarz Khosravi ◽

...

Keyword(s):

Massively Parallel ◽

Parallel Processor ◽

Structural Redundancy ◽

On Demand ◽

Processor Arrays ◽

Massively Parallel Processor

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Efficient Evaluation of Power/Area/Latency Design Trade-Offs for Coarse-Grained Reconfigurable Processor Arrays

Journal of Low Power Electronics ◽

10.1166/jolpe.2011.1114 ◽

2011 ◽

Vol 7 (1) ◽

pp. 29-40 ◽

Author(s):

Dmitrij Kissler ◽

Frank Hannig ◽

Jürgen Teich

Keyword(s):

Coarse Grained ◽

Reconfigurable Processor ◽

Processor Arrays ◽

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Real-time radar signal processing on Massively Parallel Processor Arrays

2013 Asilomar Conference on Signals, Systems and Computers ◽

10.1109/acssc.2013.6810614 ◽

2013 ◽

Author(s):

Zain-ul-Abdin ◽

Anders Ahlander ◽

Bertil Svensson

Keyword(s):

Signal Processing ◽

Real Time ◽

Massively Parallel ◽

Radar Signal ◽

Radar Signal Processing ◽

Parallel Processor ◽

Processor Arrays ◽

Massively Parallel Processor

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Design Space Exploration for Massively Parallel Processor Arrays

Lecture Notes in Computer Science - Parallel Computing Technologies ◽

10.1007/3-540-44743-1_5 ◽

2001 ◽

pp. 51-65 ◽

Author(s):

Frank Hannig ◽

Jürgen Teich

Keyword(s):

Design Space Exploration ◽

Design Space ◽

Space Exploration ◽

Massively Parallel ◽

Parallel Processor ◽

Processor Arrays ◽

Massively Parallel Processor

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Determination of an optimal processor allocation in the design of massively parallel processor arrays

Proceedings of 3rd International Conference on Algorithms and Architectures for Parallel Processing ◽

10.1109/icapp.1997.651500 ◽

2002 ◽

Author(s):

D. Fimmel ◽

R. Merker

Keyword(s):

Massively Parallel ◽

Parallel Processor ◽

Processor Allocation ◽

Processor Arrays ◽

Massively Parallel Processor

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Runtime Adaptation of Application Execution under Thermal and Power Constraints in Massively Parallel Processor Arrays

Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems - SCOPES '15 ◽

10.1145/2764967.2771933 ◽

2015 ◽

Author(s):

Éricles Sousa ◽

Frank Hannig ◽

Jürgen Teich ◽

Qingqing Chen ◽

Ulf Schlichtmann

Keyword(s):

Massively Parallel ◽

Parallel Processor ◽

Runtime Adaptation ◽

Power Constraints ◽

Processor Arrays ◽

Massively Parallel Processor ◽

Application Execution

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On-Demand Fault Tolerance on Massively Parallel Processor Arrays

Invasive Tightly Coupled Processor Arrays - Computer Architecture and Design Methodologies ◽

10.1007/978-981-10-1058-3_4 ◽

2016 ◽

pp. 115-144

Author(s):

Vahid Lari

Keyword(s):

Fault Tolerance ◽

Massively Parallel ◽

Parallel Processor ◽

On Demand ◽

Processor Arrays ◽

Massively Parallel Processor

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A system for designing parallel processor arrays

Lecture Notes in Computer Science - Computer Aided Systems Theory — EUROCAST'97 ◽

10.1007/bfb0025030 ◽

1997 ◽

pp. 1-12 ◽

Author(s):

R. Merker ◽

U. Eckhardt ◽

D. Fimmel ◽

H. Schreiber

Keyword(s):

Parallel Processor ◽

Processor Arrays

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