Low-Power Adiabatic Logic––Design and Implementation in 32-Nanometer Multigate Technology

Evolutionary Approach of Adiabatic Logic Design on Low Power Solution �A Robust Survey

i-manager s Journal on Communication Engineering and Systems ◽

10.26634/jcs.1.2.1775 ◽

2012 ◽

Vol 1 (2) ◽

pp. 36-49

Author(s):

A. Kishore Kumar ◽

D. Somasundareswari ◽

V. Duraisamy ◽

T. Shunbaga Pradeepa

Keyword(s):

Low Power ◽

Evolutionary Approach ◽

Logic Design ◽

2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS) ◽

FinFET based adiabatic logic design for low power applications

10.1109/icmdcs.2017.8211535 ◽

2017 ◽

Cited By ~ 1

Author(s):

L. Dileshwar Rao ◽

Soumya Dixit ◽

Kavita Pachkor ◽

M Aarthy

Keyword(s):

Low Power ◽

Logic Design ◽

Low Power Adiabatic Logic Design

IOSR Journal of Electronics and Communication Engineering ◽

10.9790/2834-1201032834 ◽

2017 ◽

Vol 12 (01) ◽

pp. 28-34 ◽

Cited By ~ 1

Author(s):

G.P.S. Prashanti ◽

N. Navya Sirisha ◽

N. Akhila Reddy

Keyword(s):

Low Power ◽

Logic Design ◽

A novel efficient adiabatic logic design for ultra low power

2016 International Conference on ICT in Business Industry & Government (ICTBIG) ◽

10.1109/ictbig.2016.7892723 ◽

2016 ◽

Author(s):

Akash Agrawal ◽

Tarun Kumar Gupta ◽

Ajay Kumar Dadoria ◽

Deepak Kumar

Keyword(s):

Low Power ◽

Logic Design ◽

Ultra Low Power ◽

2017 Second International Conference on Electrical, Computer and Communication Technologies (ICECCT) ◽

Performance analysis of CNTFET based low energy and low power adiabatic logic design

10.1109/icecct.2017.8118017 ◽

2017 ◽

Author(s):

Vipin Kashti ◽

Mahajan Sagar Bhaskar ◽

Sanjeevikumar Padmanaban ◽

Shreyas Charola ◽

Viliam Fedak

Keyword(s):

Performance Analysis ◽

Low Power ◽

Low Energy ◽

Logic Design ◽

Design and Implementation of 4-Bit ALU for Low-Power using Adiabatic Logic based on FINFET

International Journal of Engineering Research and ◽

10.17577/ijertv9is070238 ◽

2020 ◽

Vol V9 (07) ◽

Author(s):

Vegha. B N ◽

Keyword(s):

Low Power ◽

Design and Implementation of Low Power 8-bit Carry-look Ahead Adder Using Static CMOS Logic and Adiabatic Logic

International Journal of Information Technology and Computer Science ◽

10.5815/ijitcs.2013.11.09 ◽

2013 ◽

Vol 5 (11) ◽

pp. 78-92 ◽

Cited By ~ 4

Author(s):

Abdul Sajid ◽

Ahmad Nafees ◽

Saifur Rahman

Keyword(s):

Low Power ◽

Look Ahead ◽

Performance Analysis of 2N-N-2P Adiabatic Logic Circuits for Low Power Applications using FinFET

Procedia Computer Science ◽

10.1016/j.procs.2017.09.122 ◽

2017 ◽

Vol 115 ◽

pp. 166-173 ◽

Cited By ~ 3

Author(s):

B.P. Bhuvana ◽

V.S. Kanchana Bhaaskaran

Keyword(s):

Performance Analysis ◽

Low Power ◽

Logic Circuits ◽

Design and Implementation of a Low Power Ternary Content Addressable Memory (TCAM)

2020 International SoC Design Conference (ISOCC) ◽

10.1109/isocc50952.2020.9333092 ◽

2020 ◽

Author(s):

Karthik S ◽

Karthick D ◽

Sanjaya M V ◽

Madhav Rao

Keyword(s):

Low Power ◽

Content Addressable Memory ◽

Ternary Content Addressable Memory

1998 IEEE Workshop on Signal Processing Systems. SIPS 98. Design and Implementation (Cat. No.98TH8374) ◽

Design and implementation of low-power DCT chip for portable multimedia terminals

10.1109/sips.1998.715771 ◽

2002 ◽

Author(s):

L.-G. Chen ◽

J.-Y. Jiu ◽

H.-C. Chang

Keyword(s):

Low Power ◽

Design And Implementation