ROBUST AND SECURE S-BOX DESIGN WITH GATED HYBRID ENERGY RECOVERY LOGIC (GHERL) FOR IOT APPLICATIONS

The smart Internet of Things (IoT) network relies heavily on data transmission over wireless channels. Hence, it should be designed to be robust against the attacks from hackers and antagonists. The confidentiality in IoT devices is directly proportional to the complexity and power consumption. To mitigate these issues, this paper proposes a secure Substitution Box (S-Box) design that is exploited in the IoT for cyber security applications. The S-Box is based on Gated Hybrid Energy Recovery Logic (GHERL) that is an amalgamation of two different techniques as adiabatic logic and power gating. Adiabatic logic is preferred to attain high energy efficiency in practical applications such as portable and handheld devices. Power gating technique is preferred to reduce the leakage power and energy consumption. The proposed GHERL XOR gate and S-Box are implemented with 125nm technology in Tanner EDA tool. The consequences of the experiments exhibits that the novel S-Box design with GHERL XOR decreases the power consumption by 1.76%, 35.26%, 36.81%, 41.01% and reduces the leakage power by 58.54%, 20.27%, 27.38%, 13.63% when compared with the existing techniques such as S-Box with sleep transistor, dual sleep transistor, dual-stack and sleepy keeper approach. Keywords: Adiabatic logic, Power Gating, Internet of Things, S-Box

Low Power Adiabetic Logic System for Biomedical Applications

There have been significant advances in sensors and device structures in the medical industry, particularly in implanted medical devices. Increasingly complex electronic circuitry may now be implanted in the human body thanks to compact, high-energy batteries and hermetic packaging. These gadgets must adhere to strict power consumption guidelines due to the battery recharging schedule. Designing energy-efficient circuits and systems becomes increasingly important as a result of this fact. Adiabatic circuits provide a hopeful alternative for traditional circuitry in case of low energy design. Because of power-clock phases synchronization complexity, designing and functionally verifying presenting 4-phase adiabatic circuitry takes longer. Accordingly, multiple clock generators are used typically and can reveal enhanced consumption of energy in the network of clock distribution. Furthermore, they are not suitable for designing in high-speed because of their clock skew management and high complexity issues. In this paper, TMEL (True multi-phase energy recovering logic), the first energyrecovering/adiabatic logic family is presented for biomedical applications, which functions using the scheme multiple-phase sinusoidal clocking. Moreover, a system of SCAL, a source-coupled variation with TMEL having enhanced energy efficiency and supply voltage scalability, is introduced. A novel true multi-phase Approach and Source-coupled adiabatic logic for energy effective communication system is proposed. The adiabatic logic is employed for both write and read side operation. The CMOS inverter is integrated with TMEL cascades, which in turn reduces leakage loss. In SCAL, the optimal performance at any operating circumstance is attained byan adjustable current source in each gate. SCAL, and TMEL, are capable of outperforming existing adiabatic logic families concerning operating speed and energy efficiency. The performance analysis was carried and simulated through 45 nm CMOS inverter in terms of leakage power, delay, and power consumption. In particular, for the clock rates that range from 10 MHz to 200 MHz, the proposed SCAL was more energy-efficient and less dissipative on comparing their pipelined or purely combinational CMOS counterparts. In biomedical equipment, the system may be included into the low-power design since it is energy efficient and very robust. Improvements in VLSI technology, such as increased dynamic range, low-voltage EEPROMs (electrically eraseable programmable ROMs), and specific sensor techniques, are also expected to contribute to advancements in implanted medical devices in the near future.

EE-ACML: Energy-Efficient Adiabatic CMOS/MTJ Logic for CPA-Resistant IoT Devices

Internet of Things (IoT) devices have strict energy constraints as they often operate on a battery supply. The cryptographic operations within IoT devices consume substantial energy and are vulnerable to a class of hardware attacks known as side-channel attacks. To reduce the energy consumption and defend against side-channel attacks, we propose combining adiabatic logic and Magnetic Tunnel Junctions to form our novel Energy Efficient-Adiabatic CMOS/MTJ Logic (EE-ACML). EE-ACML is shown to be both low energy and secure when compared to existing CMOS/MTJ architectures. EE-ACML reduces dynamic energy consumption with adiabatic logic, while MTJs reduce the leakage power of a circuit. To show practical functionality and energy savings, we designed one round of PRESENT-80 with the proposed EE-ACML integrated with an adiabatic clock generator. The proposed EE-ACML-based PRESENT-80 showed energy savings of 67.24% at 25 MHz and 86.5% at 100 MHz when compared with a previously proposed CMOS/MTJ circuit. Furthermore, we performed a CPA attack on our proposed design, and the key was kept secret.