Near-optimal replacement policies for shared caches in multicore processors

2021 ◽  
Author(s):  
Javier Díaz ◽  
Pablo Ibáñez ◽  
Teresa Monreal ◽  
Víctor Viñals ◽  
José M. Llabería
Keyword(s):  
Multicore Processors ◽  
Optimal Replacement ◽  
Shared Caches

scholarly journals LEVERAGING SHARED CACHES FOR PARALLEL TEMPORAL BLOCKING OF STENCIL CODES ON MULTICORE PROCESSORS AND CLUSTERS

2010 ◽  
Vol 20 (04) ◽  
pp. 359-376 ◽  
Author(s):  
MARKUS WITTMANN ◽  
GEORG HAGER ◽  
JAN TREIBIG ◽  
GERHARD WELLEIN
Keyword(s):  
High Speed ◽  
Distributed Memory ◽  
Multicore Processors ◽  
Memory Bandwidth ◽  
Performance Models ◽  
Shared Caches ◽  
Strong Scaling ◽  
Stencil Codes ◽  
Multicore Chips ◽  
Synthetic Modeling

Bandwidth-starved multicore chips have become ubiquitous. It is well known that the performance of stencil codes can be improved by temporal blocking, lessening the pressure on the memory interface. We introduce a new pipelined approach that makes explicit use of shared caches in multicore environments and minimizes synchronization and boundary overhead. Benchmark results are presented for three current x86-based microprocessors, showing clearly that our optimization works best on designs with high-speed shared caches and low memory bandwidth per core. We furthermore demonstrate that simple bandwidth-based performance models are inaccurate for this kind of algorithm and employ a more elaborate, synthetic modeling procedure. Finally we show that temporal blocking can be employed successfully in a hybrid shared/distributed-memory environment, albeit with limited benefit at strong scaling.

scholarly journals High Performance Parallelization of COMPSYN on a Cluster of Multicore Processors with GPUs

2012 ◽  
Vol 9 ◽  
pp. 966-975
Author(s):  
Ferdinando Alessi ◽  
Annalisa Massini ◽  
Roberto Basili
Keyword(s):  
High Performance ◽  
Multicore Processors
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