Process Scheduling Challenges in the Era of Multicore Processors

Intel Technology Journal ◽

10.1535/itj.1104.09 ◽

2007 ◽

Vol 11 (04) ◽

Author(s):

Suresh Siddha

Keyword(s):

Multicore Processors ◽

Process Scheduling

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Process scheduling for future multicore processors

Proceedings of the Fifth International Workshop on Interconnection Network Architecture On-Chip, Multi-Chip - INA-OCMC '11 ◽

10.1145/1930037.1930042 ◽

2011 ◽

Author(s):

Thomas Canhao Xu ◽

Pasi Liljeberg ◽

Hannu Tenhunen

Keyword(s):

Multicore Processors ◽

Process Scheduling

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Improving CPU Performance and Equalizing Power Consumption for Multicore Processors in Agent Based Process Scheduling

Communications in Computer and Information Science - Advances in Power Electronics and Instrumentation Engineering ◽

10.1007/978-3-642-20499-9_16 ◽

2011 ◽

pp. 95-104

Author(s):

G. Muneeswari ◽

K. L. Shunmuganathan

Keyword(s):

Power Consumption ◽

Multicore Processors ◽

Process Scheduling ◽

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Designing heterogeneous systems including programmable hardware, multicore processors, DSP, processors and more

IET and Electronics Weekly Seminar on Programmable Hardware Systems ◽

10.1049/ic:20080616 ◽

2008 ◽

Author(s):

C. Turner

Keyword(s):

Multicore Processors ◽

Heterogeneous Systems ◽

Dsp Processors ◽

Programmable Hardware

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High Performance Parallelization of COMPSYN on a Cluster of Multicore Processors with GPUs

Procedia Computer Science ◽

10.1016/j.procs.2012.04.103 ◽

2012 ◽

Vol 9 ◽

pp. 966-975

Author(s):

Ferdinando Alessi ◽

Annalisa Massini ◽

Roberto Basili

Keyword(s):

High Performance ◽

Multicore Processors

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Mapping techniques in multicore processors: current and future trends

The Journal of Supercomputing ◽

10.1007/s11227-021-03650-6 ◽

2021 ◽

Author(s):

Manjari Gupta ◽

Lava Bhargava ◽

S. Indu

Keyword(s):

Multicore Processors ◽

Future Trends ◽

Mapping Techniques

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A Survey on Cache Timing Channel Attacks for Multicore Processors

Journal of Hardware and Systems Security ◽

10.1007/s41635-021-00115-3 ◽

2021 ◽

Author(s):

Jaspinder Kaur ◽

Shirshendu Das

Keyword(s):

Multicore Processors ◽

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Compression and load balancing for efficient sparse matrix‐vector product on multicore processors and graphics processing units

Concurrency and Computation Practice and Experience ◽

10.1002/cpe.6515 ◽

2021 ◽

Author(s):

José I. Aliaga ◽

Hartwig Anzt ◽

Thomas Grützmacher ◽

Enrique S. Quintana‐Ortí ◽

Andrés E. Tomás

Keyword(s):

Load Balancing ◽

Graphics Processing Units ◽

Sparse Matrix ◽

Multicore Processors ◽

Vector Product ◽

Graphics Processing ◽

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Information-flow control on ARM and POWER multicore processors

Formal Methods in System Design ◽

10.1007/s10703-021-00376-2 ◽

2021 ◽

Author(s):

Graeme Smith ◽

Nicholas Coughlin ◽

Toby Murray

Keyword(s):

Flow Control ◽

Information Flow ◽

Multicore Processors ◽

Information Flow Control

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An efficient load-balancing algorithm for image processing applications on multicore processors

Proceedings of the 1st international forum on Next-generation multicore/manycore technologies - IFMT '08 ◽

10.1145/1463768.1463778 ◽

2008 ◽

Author(s):

Ahmed El-Mahdy ◽

Hisham El-Shishiny

Keyword(s):

Image Processing ◽

Load Balancing ◽

Multicore Processors ◽

Load Balancing Algorithm

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Unfair process scheduling in Modula-2

ACM SIGPLAN Notices ◽

10.1145/43895.43896 ◽

1988 ◽

Vol 23 (3) ◽

pp. 7-12 ◽

Author(s):

David Hemmendinger

Keyword(s):

Process Scheduling

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