Modular fault tolerant VLSI parallel processor architectures with dynamic redundancy

1990 ◽  
Vol 30 (2) ◽  
pp. 213-236
Author(s):  
Venkatapathi Naidu Rayapati
Author(s):  
Alexey Kupriyanov ◽  
Dmitrij Kissler ◽  
Frank Hannig ◽  
Jürgen Teich

2005 ◽  
Vol 41 (21) ◽  
pp. 1162 ◽  
Author(s):  
E. Touloupis ◽  
J.A. Flint ◽  
V.A. Chouliaras ◽  
D.D. Ward

Robotica ◽  
1984 ◽  
Vol 2 (1) ◽  
pp. 33-40 ◽  
Author(s):  
Stanley R. Sternberg

SUMMARYMachine vision systems incorporating highly parallel processor architectures are reviewed. A new processor architecture, the image flow computer, is presented in detail. An interactive image processing programming language based on mathematical morphology is then presented. A detailed example of the use of the system for the inspection of a particular industrial part concludes the presentation.


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