This paper describes a novel video specific instruction set architecture for ASIP design. With single
instruction multiple data (SIMD) instructions, two destination modes, and video specific
instructions, an instruction set architecture is introduced to enhance the performance for video
applications. Furthermore, we quantify the improvement on H.263 encoding. In this paper, we evaluate
and compare the performance of VS-ISA, other DSPs (digital signal processors), and conventional SIMD
media extensions in the context of video coding. Our evaluation results show that VS-ISA improves the
processor's performance by approximately 5x on H.263 encoding, and VS-ISA outperforms other
architectures by 1.6x to 8.57x in computing IDCT.
A Video Specific Instruction Set Architecture for ASIP design
