An efficient routing methodology to tolerate static and dynamic faults in 2-D mesh networks-on-chip

2012 ◽  
Vol 36 (7) ◽  
pp. 531-542 ◽  
Author(s):  
Farshad Safaei ◽  
Majed ValadBeigi
2018 ◽  
Vol 89 ◽  
pp. 84-94 ◽  
Author(s):  
Li Zhang ◽  
Xiaohang Wang ◽  
Yingtao Jiang ◽  
Mei Yang ◽  
Terrence Mak ◽  
...  

2008 ◽  
Vol 57 (9) ◽  
pp. 1202-1215 ◽  
Author(s):  
E. Cota ◽  
F.L. Kastensmidt ◽  
M. Cassel ◽  
M. Herve ◽  
P. Meirelles ◽  
...  

2018 ◽  
Vol 81 ◽  
pp. 123-136
Author(s):  
Maryam Rezaei-Ravari ◽  
Vahid Sattari-Naeini

2014 ◽  
Vol 36 (5) ◽  
pp. 988-1003 ◽  
Author(s):  
Shuai ZHANG ◽  
Feng-Long SONG ◽  
Dong WANG ◽  
Zhi-Yong LIU ◽  
Dong-Rui FAN

2018 ◽  
Vol 8 (4) ◽  
pp. 39 ◽  
Author(s):  
Franco Fuschini ◽  
Marina Barbiroli ◽  
Marco Zoli ◽  
Gaetano Bellanca ◽  
Giovanna Calò ◽  
...  

Multi-core processors are likely to be a point of no return to meet the unending demand for increasing computational power. Nevertheless, the physical interconnection of many cores might currently represent the bottleneck toward kilo-core architectures. Optical wireless networks on-chip are therefore being considered as promising solutions to overcome the technological limits of wired interconnects. In this work, the spatial properties of the on-chip wireless channel are investigated through a ray tracing approach applied to a layered representation of the chip structure, highlighting the relationship between path loss, antenna positions and radiation properties.


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