High performance hardware support for elliptic curve cryptography over general prime field

2017 ◽  
Vol 51 ◽  
pp. 331-342 ◽  
Author(s):  
Khalid Javeed ◽  
Xiaojun Wang ◽  
Mike Scott
2021 ◽  
Vol 2021 ◽  
pp. 1-8
Author(s):  
Yong Xiao ◽  
Weibin Lin ◽  
Yun Zhao ◽  
Chao Cui ◽  
Ziwen Cai

Teleoperated robotic systems are those in which human operators control remote robots through a communication network. The deployment and integration of teleoperated robot’s systems in the medical operation have been hampered by many issues, such as safety concerns. Elliptic curve cryptography (ECC), an asymmetric cryptographic algorithm, is widely applied to practical applications because its far significantly reduced key length has the same level of security as RSA. The efficiency of ECC on GF (p) is dictated by two critical factors, namely, modular multiplication (MM) and point multiplication (PM) scheduling. In this paper, the high-performance ECC architecture of SM2 is presented. MM is composed of multiplication and modular reduction (MR) in the prime field. A two-stage modular reduction (TSMR) algorithm in the SCA-256 prime field is introduced to achieve low latency, which avoids more iterative subtraction operations than traditional algorithms. To cut down the run time, a schedule is put forward when exploiting the parallelism of multiplication and MR inside PM. Synthesized with a 0.13 um CMOS standard cell library, the proposed processor consumes 341.98k gate areas, and each PM takes 0.092 ms.


2012 ◽  
Vol 2012 ◽  
pp. 1-14 ◽  
Author(s):  
Lyndon Judge ◽  
Suvarna Mane ◽  
Patrick Schaumont

Elliptic curve cryptography (ECC) has become a popular public key cryptography standard. The security of ECC is due to the difficulty of solving the elliptic curve discrete logarithm problem (ECDLP). In this paper, we demonstrate a successful attack on ECC over prime field using the Pollard rho algorithm implemented on a hardware-software cointegrated platform. We propose a high-performance architecture for multiplication over prime field using specialized DSP blocks in the FPGA. We characterize this architecture by exploring the design space to determine the optimal integer basis for polynomial representation and we demonstrate an efficient mapping of this design to multiple standard prime field elliptic curves. We use the resulting modular multiplier to demonstrate low-latency multiplications for curves secp112r1 and P-192. We apply our modular multiplier to implement a complete attack on secp112r1 using a Nallatech FSB-Compute platform with Virtex-5 FPGA. The measured performance of the resulting design is 114 cycles per Pollard rho step at 100 MHz, which gives 878 K iterations per second per ECC core. We extend this design to a multicore ECDLP implementation that achieves 14.05 M iterations per second with 16 parallel point addition cores.


2019 ◽  
Vol 45 (3) ◽  
pp. 1-35 ◽  
Author(s):  
Armando Faz-Hernández ◽  
Julio López ◽  
Ricardo Dahab

2013 ◽  
Vol 380-384 ◽  
pp. 2407-2410
Author(s):  
Xin Xu ◽  
Ping Zhu ◽  
Zheng Ping Jin ◽  
Hua Zhang

Recently, several protocols came into being successively to meet the requirement of efficient operations in low-power roaming environment with the fast advance of communication technologies. Unfortunately, these protocols are not a suitable candidate for special requirements in automobile roaming system such as low consumption, high performance and convenience since these protocols pay more attention to a common network environment. In this paper, we address the problem of mutual authentication and key agreement with user anonymity for an automobile roaming system. More specifically, we propose the protocol employs elliptic curve cryptography system to enhance operational efficiency and take into account common attacks and give corresponding resist measures to ensure security. The analysis shows our scheme is user friendly and secure.


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