Elbrus OS Virtualization

A milestone on the way towards high-performance and secure virtualization systems is the implementation of hardware support for this technology in microprocessors. The article provides an overview of the virtualization methods adapted for the Elbrus architecture, taking into account the hardware support implemented in the next generation Elbrus-16S microprocessors.

HARDWARE SUPPORT PROCEDURES FOR ASYMMETRIC AUTHENTICATION OF THE INTERNET OF THINGS

Subject of research: procedures of asymmetric authentication of Internet of Things nodes to ensure the highest level of security using cryptographic chips. The aim of the article is to study the ways of potential use of cryptographic chips to ensure secure authentication of Internet of Things sites using asymmetric cryptography procedures. The article solves the following tasks: analysis of hardware support technologies for asymmetric cryptography of the Internet of Things; definition of secure procedures for asymmetric authentication of Internet of Things sites and their constituent elements: creation of certificates, verification of public and private keys. Research methods: method of structural and functional analysis and design of complex systems, methods of identification and authentication of information objects, cryptographic methods of information protection, methods of security analysis of distributed information systems. The novelty of the study is the analysis of hardware support technologies for asymmetric cryptography of Internet of Things with cryptographic chips and the definition of structural and functional schemes for the implementation of procedures for asymmetric authentication of Internet of Things. Distinctive features of the provided asymmetric authentication schemes and procedures are: ensuring an increased level of information security through secure storage of cryptographic keys, digital signatures, certificates, confidential data in a novelty security environment protected from external attacks and no need to store private keys on the host side. The results of the work are procedures and schemes of application of cryptomicrops of asymmetric authentication to ensure the protection of Internet of Things. Analysis of the functioning of the presented schemes allowed to draw the following conclusions. The proposed structural and functional schemes for the implementation of procedures for asymmetric authentication of Internet of Things using cryptographic chips give the user an easy opportunity to implement cryptography without expertise in this field. These chips use the ECDSA digital signature computing and verification hardware with elliptical curve advantages, as a proven and reliable authentication algorithm, and the ECDH symmetric encryption session key generation unit. The provided schemes and procedures support three components of information security, namely: confidentiality, integrity and authenticity of data. Examples of potential applications of the provided schemes and procedures can be implemented using any asymmetric authentication chip, but it is recommended that they be used to generate encryption session keys and where digital signatures are required to verify data and code for integrity and authenticity.

Algebraic Characteristics of the Matrix Conversions Class and Its Hardware Implementation

This paper derives the algebraic characteristic of the matrix transformations class by the method of isomorphic mappings on the algebraic characteristic of the class of vector transformations using the primitive program algebras. The paper also describes the hardware implementation of the matrix operations accelerator based on the obtained results. The urgency of the work is caused by the fact that today there is a rapid integration of computer technology in all spheres of society and, as a consequence, the amount of data that needs to be processed per unit time is constantly increasing. Many problems involving large amounts of complex computation are solved by methods based on matrix operations. Therefore, the study of matrix calculations and their acceleration is a very important task. In this paper, as a contribution in this direction, we propose a study of the matrix transformations class using signature operations of primitive program algebra such as multi place superposition, branching, cycling, which are refinements of the most common control structures in most high-level programming languages, and also isomorphic mapping. Signature operations of primitive program algebra in combination with basic partial-recursive matrix functions and predicates allow to realize the set of all partial-recursive matrix functions and predicates. Obtained the result on the basis of matrix primitive program algebra. Isomorphism provides the reproduction of partially recursive functions and predicates for matrix transformations as a map of partially recursive vector functions and predicates. The completeness of the algebraic system of matrix transformations is ensured due to the available results on the derivation of the algebraic system completeness for vector transformations. A name model of matrix data has been created and optimized for the development of hardware implementation. The hardware implementation provides support for signature operations of primitive software algebra and for isomorphic mapping. Hardware support for the functions of sum, multiplication and transposition of matrices, as well as the predicate of equality of two matrices is implemented. Support for signature operations of primitive software algebra is provided by the design of the control part of the matrix computer based on the RISC architecture. The hardware support of isomorphism is based on counters, they allow to intuitively implement cycling in the functions of isomorphic mappings. Fast execution of vector operations is provided by the principle of computer calculations SIMD.