scholarly journals Corrigendum: Throughput/area optimised pipelined architecture for elliptic curve crypto processor

2021 ◽  
Vol 15 (1) ◽  
pp. 77-77
Author(s):  
Muhammad Rashid
Keyword(s):  
Elliptic Curve ◽  
Pipelined Architecture

Redundant-Signed-Digit-Based High Speed Elliptic Curve Cryptographic Processor

2019 ◽  
Vol 28 (05) ◽  
pp. 1950081 ◽  
Author(s):  
Yasir A. Shah ◽  
Khalid Javeed ◽  
Shoaib Azmat ◽  
Xiaojun Wang
Keyword(s):  
Elliptic Curve ◽  
High Speed ◽  
Clock Cycle ◽  
Propagation Delay ◽  
System Level ◽  
Modular Arithmetic ◽  
Pipelined Architecture ◽  
Field Programmable ◽  
Cycle Count ◽  
Modular Multiplier

In this paper, a high speed elliptic curve cryptographic (ECC) processor for National Institute of Standards and Technology (NIST) recommended prime [Formula: see text] is proposed. The modular arithmetic components in the proposed ECC processor are highly optimized at both architectural level and circuit level. Redundant-signed-digit (RSD) arithmetic is adopted in the modular arithmetic components to avoid lengthy carry propagation delay. A high speed modular multiplier is designed based on an efficient segmentation and pipelining strategy. The clock cycle count is reduced as result of the segmentation, whereas operating frequency and throughput are significantly increased due to the pipelining. An optimized pipelined architecture for modular division is also presented which is suitable for the design of ECC processor using projective coordinates. The Joye’s double and add (DAA) algorithm based on [Formula: see text]-only common [Formula: see text] (co-[Formula: see text]) coordinate is adopted at the system level for its regular and efficient behavior. The proposed ECC processor is flexible and can be implemented using any field programmable gate array (FPGA) family or standard cell libraries. The proposed ECC processor executes a single elliptic curve (EC) point multiplication (PM) operation in 0.47[Formula: see text]ms at a maximum frequency of 327[Formula: see text]MHz on Virtex-6 FPGA. The implementation results demonstrate that the proposed ECC processor outperforms the other contemporary designs reported in the literature in terms of speed and [Formula: see text] metrics.

Throughput/area optimised pipelined architecture for elliptic curve crypto processor

2019 ◽  
Vol 13 (5) ◽  
pp. 361-368 ◽  
Author(s):  
Malik Imran ◽  
Muhammad Rashid ◽  
Atif Raza Jafri ◽  
Muhammad Kashif
Keyword(s):  
Elliptic Curve ◽  
Pipelined Architecture

Study of Safe Elliptic Curve Cryptography over Gaussian Integer

2020 ◽  
Vol E103.A (12) ◽  
pp. 1624-1628
Author(s):  
Kazuki NAGANUMA ◽  
Takashi SUZUKI ◽  
Hiroyuki TSUJI ◽  
Tomoaki KIMURA
Keyword(s):  
Elliptic Curve ◽  
Elliptic Curve Cryptography ◽  
Gaussian Integer

Enhanced Security Authentication of WiMAX using EC3A

2017 ◽  
Vol 7 (8) ◽  
pp. 219
Author(s):  
Mohd Javed ◽  
Khaleel Ahmad ◽  
Ahmad Talha Siddiqui
Keyword(s):  
Cellular Automata ◽  
Elliptic Curve ◽  
Elliptic Curve Cryptography ◽  
Information Rate ◽  
Security Authentication ◽  
Encryption And Decryption ◽  
High Information

WiMAX is the innovation and upgradation of 802.16 benchmarks given by IEEE. It has numerous remarkable qualities, for example, high information rate, the nature of the service, versatility, security and portability putting it heads and shoulder over the current advancements like broadband link, DSL and remote systems. Though like its competitors the concern for security remains mandatory. Since the remote medium is accessible to call, the assailants can undoubtedly get into the system, making the powerless against the client. Many modern confirmations and encryption methods have been installed into WiMAX; however, regardless it opens with up different dangers. In this paper, we proposed Elliptic curve Cryptography based on Cellular Automata (EC3A) for encryption and decryption the message for improving the WiMAX security

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