Systematic realisation of binary and multivalued logic functions using charge coupled building blocks

1991 ◽  
Vol 138 (6) ◽  
pp. 694
Author(s):  
H.M. Abd-El-Barr
2013 ◽  
Vol 740-742 ◽  
pp. 1052-1055
Author(s):  
H. Habib ◽  
N.G. Wright ◽  
A.B. Horsfall

The static and dynamic characteristics of Complementary JFET (CJFET) logic inverter are studied across a range of temperatures and supply voltages to assess potential improvements in performance of digital logic functions for operation in extreme environments. The logic inverter is truly the core of all digital designs. The design and analysis of inverter enables the design of more complex structures, such as NAND, NOR and XOR gates. These complex structures in turn form the building blocks for modules, such as adders, multipliers and microprocessors. At 500 deg C and operating at a supply voltage of 1 V, the CJFET inverter have noise margin comparable to that of room temperature silicon and silicon on insulator CMOS inverters. Furthermore, the static power dissipation by CJFET inverter at 500 deg C is 20.6 nW which is six orders of magnitude lower than that by current SiC technologies, making CJFET technology ideal for achieving complex logic functions, far greater than a few-transistors ICs, in the nearer term.


1987 ◽  
Vol 63 (2) ◽  
pp. 171-183 ◽  
Author(s):  
TAYEB A. GUIMA ◽  
MOIEZ A. TAPIA

1996 ◽  
Vol 32 (6) ◽  
pp. 777-793 ◽  
Author(s):  
V. G. Levashenko ◽  
V. P. Shmerko ◽  
S. N. Yanushkevich

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