We report on the development and performance of a novel track-finding processor for the Level-1 trigger of the CMS endcap muon system. The processor links track segments identified in the cathode-strip chambers of the endcap muon system into complete three-dimensional tracks. It then measures the momentum of the best track candidates from the sagitta measured between three muon chambers in the endcap fringe field. The processor is pipelined at 40 MHz, and has an overall latency of 400 ns. The logic for the prototype is implemented in high-density FPGAs and SRAM memory. It receives approximately 3 gigabytes of data every second from a custom backplane operating at 280 MHz. Test results of the prototype are consistent with expectation.
Upgrades to the CSC Cathode Strip Chamber electronics for HL-LHC
