Parallel implementation of linear feedback shift registers for low power applications

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ◽

10.1109/82.502318 ◽

1996 ◽

Vol 43 (6) ◽

pp. 458-466 ◽

Author(s):

M. Lowy

Keyword(s):

Low Power ◽

Parallel Implementation ◽

Linear Feedback ◽

Linear Feedback Shift Registers ◽

Feedback Shift Registers

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A Low-Power Parallel Architecture for Linear Feedback Shift Registers

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2018.2860934 ◽

2019 ◽

Vol 66 (3) ◽

pp. 412-416 ◽

Author(s):

Xinmiao Zhang

Keyword(s):

Low Power ◽

Parallel Architecture ◽

Linear Feedback ◽

Linear Feedback Shift Registers ◽

Feedback Shift Registers

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Low Power Memory Built in Self Test Address Generator Using Clock Controlled Linear Feedback Shift Registers

Journal of Electronic Testing ◽

10.1007/s10836-014-5432-1 ◽

2014 ◽

Vol 30 (1) ◽

pp. 77-85 ◽

Author(s):

K. Murali Krishna ◽

M. Sailaja

Keyword(s):

Low Power ◽

Linear Feedback ◽

Linear Feedback Shift Registers ◽

Address Generator ◽

Feedback Shift Registers ◽

Self Test ◽

Built In Self Test

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Design of low power subthreshold linear feedback shift registers

2016 IEEE 1st International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES) ◽

10.1109/icpeices.2016.7853593 ◽

2016 ◽

Author(s):

Kirti Gupta ◽

Prayanshu Sharma ◽

Neeta Pandey

Keyword(s):

Low Power ◽

Linear Feedback ◽

Linear Feedback Shift Registers ◽

Feedback Shift Registers

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A note to low-power linear feedback shift registers

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ◽

10.1109/82.718599 ◽

1998 ◽

Vol 45 (9) ◽

pp. 1304-1307 ◽

Author(s):

M.E. Hamid ◽

Chien-In Henry Chen

Keyword(s):

Low Power ◽

Linear Feedback ◽

Linear Feedback Shift Registers ◽

Feedback Shift Registers

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A new low power BIST methodology by altering the structure of linear feedback shift registers

ASICON 2001. 2001 4th International Conference on ASIC Proceedings (Cat. No.01TH8549) ◽

10.1109/icasic.2001.982646 ◽

2002 ◽

Author(s):

Rui Li ◽

Chen Hu ◽

Jun Yang ◽

Zhe Zhang ◽

Youhua Shi ◽

...

Keyword(s):

Low Power ◽

Linear Feedback ◽

Linear Feedback Shift Registers ◽

Feedback Shift Registers

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Deterministic Built-In Self-Test Using Multiple Linear Feedback Shift Registers for Low-Power Scan Testing

2009 Asian Test Symposium ◽

10.1109/ats.2009.50 ◽

2009 ◽

Author(s):

Lung-Jen Lee ◽

Wang-Dauh Tseng ◽

Rung-Bin Lin ◽

Chi-Wei Yu

Keyword(s):

Low Power ◽

Linear Feedback ◽

Linear Feedback Shift Registers ◽

Scan Testing ◽

Feedback Shift Registers ◽

Self Test ◽

Built In Self Test

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A new parallel architecture for low power linear feedback shift registers

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) ◽

10.1109/iscas.2004.1329276 ◽

2004 ◽

Author(s):

A. Mamun ◽

R. Katti

Keyword(s):

Low Power ◽

Parallel Architecture ◽

Linear Feedback ◽

Linear Feedback Shift Registers ◽

Feedback Shift Registers

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Signal-flow graphs and linear feedback shift registers (Corresp.)

IEEE Transactions on Information Theory ◽

10.1109/tit.1967.1053950 ◽

1967 ◽

Vol 13 (1) ◽

pp. 119-120

Author(s):

A. Davies

Keyword(s):

Linear Feedback ◽

Linear Feedback Shift Registers ◽

Signal Flow ◽

Signal Flow Graphs ◽

Feedback Shift Registers ◽

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Gated-Clock Design of Linear-Feedback Shift Registers

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2007.914901 ◽

2008 ◽

Vol 55 (6) ◽

pp. 546-550 ◽

Author(s):

W. Aloisi ◽

R. Mita

Keyword(s):

Linear Feedback ◽

Linear Feedback Shift Registers ◽

Feedback Shift Registers ◽

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Signature analysis with modified linear feedback shift registers (M-LFSRs)

[1991] Digest of Papers. Fault-Tolerant Computing: The Twenty-First International Symposium ◽

10.1109/ftcs.1991.146639 ◽

2002 ◽

Author(s):

R. Raina ◽

P.N. Marionos

Keyword(s):

Linear Feedback ◽

Signature Analysis ◽

Linear Feedback Shift Registers ◽

Feedback Shift Registers

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