A 14-bit and 70-dB dynamic range, continuous time, sigma delta modulator

Author(s):  
Dragos Ducu
2009 ◽  
Vol 30 (12) ◽  
pp. 125011 ◽  
Author(s):  
Li Yuanwen ◽  
Qi Da ◽  
Dong Yifeng ◽  
Xu Jun ◽  
Ren Junyan

2008 ◽  
Vol 43 (4) ◽  
pp. 796-804 ◽  
Author(s):  
Scott D. Kulchycki ◽  
Roxana Trofin ◽  
Katelijn Vleugels ◽  
Bruce A. Wooley

2007 ◽  
Vol 42 (12) ◽  
pp. 2696-2705 ◽  
Author(s):  
Lucien J. Breems ◽  
Robert Rutten ◽  
Robert H. M. van Veldhoven ◽  
Gerard van der Weide

2004 ◽  
Vol 1 (3) ◽  
pp. 37-44 ◽  
Author(s):  
Dragisa Milovanovic ◽  
Milan Savic ◽  
Miljan Nikolic

As a part of wider project sigma-delta modulator was designed. It represents an A/D part of a power meter IC. Requirements imposed were: SNDR and dynamic range > 50 dB for maximum input swing of 250 mV differential at 50 Hz. Over sampling ratio is 128 with clock frequency of 524288 Hz which gives bandwidth of 2048 Hz. Circuit is designed in 3.3 V supply standard CMOS 0.35 ?m technology.


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