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Delay-optimal technology mapping by DAG covering
Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)
◽
10.1109/dac.1998.724495
◽
2002
◽
Cited By ~ 1
Author(s):
Y. Kukimoto
◽
R.K. Brayton
◽
P. Sawkar
Keyword(s):
Technology Mapping
◽
Optimal Technology
Download Full-text
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References
An improved algorithm for performance optimal technology mapping with retiming in LUT-based FPGA design
Proceedings International Conference on Computer Design. VLSI in Computers and Processors
◽
10.1109/iccd.1996.563608
◽
2002
◽
Cited By ~ 4
Author(s):
J. Cong
◽
C. Wu
Keyword(s):
Technology Mapping
◽
Fpga Design
◽
Optimal Technology
◽
Improved Algorithm
Download Full-text
An optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs
IEEE/ACM International Conference on Computer-Aided Design
◽
10.1109/iccad.1992.279398
◽
1992
◽
Cited By ~ 58
Author(s):
Cong
◽
Ding
Keyword(s):
Lookup Table
◽
Technology Mapping
◽
Mapping Algorithm
◽
Delay Optimization
◽
Optimal Technology
Download Full-text
Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA designs
ACM Transactions on Design Automation of Electronic Systems
◽
10.1145/335043.335045
◽
2000
◽
Vol 5
(2)
◽
pp. 193-225
◽
Cited By ~ 6
Author(s):
Jason Cong
◽
Yean-Yow Hwang
Keyword(s):
Technology Mapping
◽
Optimal Technology
Download Full-text
An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs
The Best of ICCAD
◽
10.1007/978-1-4615-0292-0_19
◽
2003
◽
pp. 235-248
Author(s):
Jason Cong
◽
Yuzheng Ding
Keyword(s):
Lookup Table
◽
Technology Mapping
◽
Mapping Algorithm
◽
Delay Optimization
◽
Optimal Technology
Download Full-text
FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
◽
10.1109/43.273754
◽
1994
◽
Vol 13
(1)
◽
pp. 1-12
◽
Cited By ~ 318
Author(s):
J. Cong
◽
Yuzheng Ding
Keyword(s):
Lookup Table
◽
Technology Mapping
◽
Mapping Algorithm
◽
Delay Optimization
◽
Optimal Technology
Download Full-text
Delay-optimal technology mapping for in-memory computing using ReRAM devices
Proceedings of the 35th International Conference on Computer-Aided Design - ICCAD '16
◽
10.1145/2966986.2967020
◽
2016
◽
Cited By ~ 7
Author(s):
Debjyoti Bhattacharjee
◽
Anupam Chattopadhyay
Keyword(s):
Technology Mapping
◽
Optimal Technology
Download Full-text
Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA design
33rd Design Automation Conference Proceedings, 1996
◽
10.1145/240518.240656
◽
1996
◽
Cited By ~ 1
Author(s):
Jason Cong
◽
Yean-Yow Hwang
Keyword(s):
Technology Mapping
◽
Fpga Design
◽
Optimal Technology
Download Full-text
Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA design
33rd Design Automation Conference Proceedings, 1996
◽
10.1109/dac.1996.545668
◽
2005
◽
Cited By ~ 8
Author(s):
J. Cong
◽
Yean-Yow Hwang
Keyword(s):
Technology Mapping
◽
Fpga Design
◽
Optimal Technology
Download Full-text
Delay-optimal technology mapping for FPGAs with heterogeneous LUTs
Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)
◽
10.1145/277044.277221
◽
1998
◽
Cited By ~ 11
Author(s):
Jason Cong
◽
Songjie Xu
Keyword(s):
Technology Mapping
◽
Optimal Technology
Download Full-text
Delay-optimal technology mapping by DAG covering
Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)
◽
10.1145/277044.277142
◽
1998
◽
Cited By ~ 39
Author(s):
Yuji Kukimoto
◽
Robert K. Brayton
◽
Prashant Sawkar
Keyword(s):
Technology Mapping
◽
Optimal Technology
Download Full-text
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