IEEE/ACM International Conference on Computer-Aided Design
Latest Publications

TOTAL DOCUMENTS

110

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE Comput. Soc. Press

0818630108

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Efficiency improvements for force-directed scheduling

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279359 ◽

1992 ◽

Cited By ~ 15

Author(s):

Verhaegh ◽

Lippens ◽

Aarts ◽

Korst ◽

van der Werf ◽

...

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A zero-skew clock routing scheme for VLSI circuits

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279328 ◽

1992 ◽

Cited By ~ 13

Author(s):

Li ◽

Jabri

Keyword(s):

Vlsi Circuits ◽

Routing Scheme ◽

Clock Routing ◽

Zero Skew

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On channel segmentation design for row-based FPGAs

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279403 ◽

1992 ◽

Cited By ~ 21

Author(s):

Zhu ◽

Wong

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An efficient multi-view design model for real-time interactive synthesis

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279352 ◽

1992 ◽

Cited By ~ 6

Author(s):

Wu ◽

Hadley ◽

Gajski

Keyword(s):

Real Time ◽

Design Model

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A partitioning algorithm for system-level synthesis

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279323 ◽

1992 ◽

Cited By ~ 8

Author(s):

Menez ◽

Auguin ◽

Boeri ◽

Carriere

Keyword(s):

System Level ◽

Partitioning Algorithm

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A comparative study of design for testability methods using high-level and gate-level descriptions

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279302 ◽

1992 ◽

Cited By ~ 13

Author(s):

Chickermane ◽

Lee ◽

Patel

Keyword(s):

Comparative Study ◽

Design For Testability ◽

High Level

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Efficient partitioning and analysis of digital CMOS-circuits

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279360 ◽

1992 ◽

Cited By ~ 6

Author(s):

Hubner ◽

Vierhaus

Keyword(s):

Cmos Circuits ◽

Digital Cmos

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New channel segmentation model and associated routing algorithm for high performance FPGAs

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279404 ◽

1992 ◽

Cited By ~ 9

Author(s):

Burman ◽

Kamalanathan ◽

Sherwani

Keyword(s):

High Performance ◽

Routing Algorithm

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Efficient techniques for inductance extraction of complex 3-D geometries

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279331 ◽

1992 ◽

Cited By ~ 14

Author(s):

Kamon ◽

Tsuk ◽

Smithhisler ◽

White

Keyword(s):

Inductance Extraction

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A scheduling method by stepwise expansion in high-level synthesis

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279368 ◽

1992 ◽

Cited By ~ 4

Author(s):

Komi ◽

Yamada ◽

Fukunaga

Keyword(s):

High Level Synthesis ◽

Scheduling Method ◽

High Level

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IEEE/ACM International Conference on Computer-Aided DesignLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc. Press

Efficiency improvements for force-directed scheduling

A zero-skew clock routing scheme for VLSI circuits

On channel segmentation design for row-based FPGAs

An efficient multi-view design model for real-time interactive synthesis

A partitioning algorithm for system-level synthesis

A comparative study of design for testability methods using high-level and gate-level descriptions

Efficient partitioning and analysis of digital CMOS-circuits

New channel segmentation model and associated routing algorithm for high performance FPGAs

Efficient techniques for inductance extraction of complex 3-D geometries

A scheduling method by stepwise expansion in high-level synthesis

IEEE/ACM International Conference on Computer-Aided Design
Latest Publications