Short locking time Phase-Locked Loop based on adaptive bandwidth control

Author(s):  
Zhongjie Guo ◽  
Longsheng Wu ◽  
Youbao Liu
2003 ◽  
Vol 5 (1) ◽  
pp. 14-26 ◽  
Author(s):  
Peerapon Siripongwutikorn ◽  
Sujata Banerjee ◽  
David Tipper

2020 ◽  
Vol 9 (5) ◽  
pp. 131-135
Author(s):  
Yoshiki Inuzuka ◽  
Shigeru Tomisato ◽  
Kazuhiro Uehara ◽  
Satoru Shimizu ◽  
Yoshinori Suzuki

2017 ◽  
Vol 7 (2) ◽  
pp. 1473-1477 ◽  
Author(s):  
H. E. Taheri

A low power, low phase noise adaptive bandwidth phase locked loop is presented in this paper. The proposed structure benefits from a novel lock status monitor unit (LSMU) that determines loop operation and loop bandwidth. The loop filter resistance and charge pump current are inversely proportional and bandwidth to reference frequency is maintained fixed. This structure is simulated in 0.18 μm CMOS technology and simulation results are presented.


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