Structural Go/No-Go test of the TD-ADC for catastrophic faults

Author(s):  
Asser K. ElSayed ◽  
Sahar M. Hamed ◽  
Ahmed H. Madian ◽  
Hassanein H. Amer ◽  
M. B. Abdelhalim
Keyword(s):  
Integration ◽  
1996 ◽  
Vol 20 (3) ◽  
pp. 327-342 ◽  
Author(s):  
Amiya Nayak ◽  
Linda Pagli ◽  
Nicola Santoro

1997 ◽  
Vol 75 (2) ◽  
pp. 105-123 ◽  
Author(s):  
Roberto De Prisco ◽  
Alfredo De Santis

2015 ◽  
Vol 28 (2) ◽  
pp. 223-236 ◽  
Author(s):  
Miljana Milic ◽  
Vanco Litovski

Testing switched capacitor circuits is a challenge due to the diversity of the possible faults. A special problem encountered is the synthesis of the test signal that will control and make the fault-effect observable at the test point. The oscillation based method which was adopted for testing in these proceedings resolves that important issue in its nature. Here we discuss the properties of the method and the conditions to be fulfilled in order to implement it in the right way. To achieve that, we have resolved the problem of synthesis of the positive feed-back circuit and the choice of a proper model of the operational amplifier. In that way, a realistic foundation to the testing process was generated. A second order notch cell was chosen as a case-study. Fault dictionaries were developed related to the catastrophic faults of the switches used within the cell. The results reported here are a continuation of our previous work and are complimentary to some other already published.


Author(s):  
Mahmoud M. Fouad ◽  
Hassanein H. Amer ◽  
Ahmed H. Madian ◽  
M. B. AbdelHalim
Keyword(s):  
Low Cost ◽  

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