Chip Package Interaction(CPI) risk assessment on 28nm Back End of Line(BEOL) stack of a large I/O chip using compact 3D FEA modeling
1998 ◽
Vol 62
(10)
◽
pp. 756-761
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Keyword(s):
1995 ◽
Vol 59
(10)
◽
pp. 932-940
◽
1999 ◽
Vol 63
(10)
◽
pp. 745-747
◽
Keyword(s):
1998 ◽
Vol 5
(1)
◽
pp. 47A-47A
Keyword(s):