Chip Package Interaction(CPI) risk assessment on 28nm Back End of Line(BEOL) stack of a large I/O chip using compact 3D FEA modeling

Author(s):  
Chirag Shah ◽  
Fahad Mirza ◽  
C S Premachandran
Keyword(s):  
1998 ◽  
Vol 62 (10) ◽  
pp. 756-761 ◽  
Author(s):  
CW Douglass
Keyword(s):  

2006 ◽  
Vol 175 (4S) ◽  
pp. 531-532
Author(s):  
Matthew R. Cooperberg ◽  
Stephen J. Freedland ◽  
David J. Pasta ◽  
Eric P. Elkin ◽  
Joseph C. Presti ◽  
...  

2011 ◽  
Vol 44 (1) ◽  
pp. 46-47
Author(s):  
HOWARD P. LEVY

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