OIV-CMOS: A novel approach towards leakage power reduction

2015 International Conference on Computer and Computational Sciences (ICCCS) ◽

10.1109/iccacs.2015.7361132 ◽

2015 ◽

Author(s):

Nidhi Gaur ◽

Smita Singhal ◽

Pradeep Kumar ◽

Anu Mehra

Keyword(s):

Power Reduction ◽

Leakage Power ◽

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A novel approach for leakage power reduction in deep submicron technologies in CMOS VLSI circuits

2015 International Conference on Computer, Communication and Control (IC4) ◽

10.1109/ic4.2015.7375536 ◽

2015 ◽

Author(s):

Ajay Kumar Dadoria ◽

Kavita Khare ◽

R. P. Singh

Keyword(s):

Deep Submicron ◽

Power Reduction ◽

Leakage Power ◽

Vlsi Circuits ◽

Novel Approach ◽

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A Novel Approach for Leakage Power Reduction Techniques in 65nm Technologies

International Journal of VLSI Design & Communication Systems ◽

10.5121/vlsic.2014.5301 ◽

2014 ◽

Vol 5 (3) ◽

pp. 01-11 ◽

Author(s):

Ajay Kumar Dadoria ◽

Kavita Khare

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Reduction Techniques ◽

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LEAKAGE POWER REDUCTION USING MULTI MODAL DRIVEN HIERARCHICAL POWER MODE SWITCHES

i-manager s Journal on Circuits and Systems ◽

10.26634/jcir.6.2.14291 ◽

2018 ◽

Vol 6 (2) ◽

pp. 1

Author(s):

SEKHAR REDDY M. CHANDRA ◽

REDDY P. RAMANA ◽

◽

Keyword(s):

Power Reduction ◽

Leakage Power ◽

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A novel approach for power reduction in asynchronous circuits by using AFPT

2014 Eleventh International Conference on Wireless and Optical Communications Networks (WOCN) ◽

10.1109/wocn.2014.6923091 ◽

2014 ◽

Author(s):

Shravan ◽

Pavan Kumar ◽

K. Sivani

Keyword(s):

Asynchronous Circuits ◽

Power Reduction ◽

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Effect of leakage power reduction techniques on combinational circuits

2015 Online International Conference on Green Engineering and Technologies (IC-GET) ◽

10.1109/get.2015.7453862 ◽

2015 ◽

Author(s):

M. Manoranjani ◽

T. Ravi ◽

R. Ramya

Keyword(s):

Power Reduction ◽

Leakage Power ◽

Combinational Circuits ◽

Reduction Techniques

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Exploring the limits of leakage power reduction in caches

ACM Transactions on Architecture and Code Optimization ◽

10.1145/1089008.1089009 ◽

2005 ◽

Vol 2 (3) ◽

pp. 221-246 ◽

Author(s):

Yan Meng ◽

Timothy Sherwood ◽

Ryan Kastner

Keyword(s):

Power Reduction ◽

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Leakage power reduction in CMOS modulo4 adder and modulo4 multiplier in sub-micron technology

International Conference on Sustainable Energy and Intelligent Systems (SEISCON 2011) ◽

10.1049/cp.2011.0430 ◽

2011 ◽

Author(s):

M.J. Rani ◽

S. Malarkkan

Keyword(s):

Power Reduction ◽

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Fine-Grain Leakage Power Reduction Method for m-out-of-n Encoded Circuits Using Multi-threshold-Voltage Transistors

2009 15th IEEE Symposium on Asynchronous Circuits and Systems ◽

10.1109/async.2009.11 ◽

2009 ◽

Author(s):

Masashi Imai ◽

Kouei Takada ◽

Takashi Nanya

Keyword(s):

Threshold Voltage ◽

Reduction Method ◽

Power Reduction ◽

Leakage Power ◽

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Robust SAT-Based Search Algorithm for Leakage Power Reduction

Lecture Notes in Computer Science - Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/3-540-45716-x_17 ◽

2002 ◽

pp. 167-177 ◽

Author(s):

Fadi A. Aloul ◽

Soha Hassoun ◽

Karem A. Sakallah ◽

David Blaauw

Keyword(s):

Search Algorithm ◽

Power Reduction ◽

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Leakage Power Reduction in Deep Submicron VLSI Circuits Using Delay-Based Power Gating

National Academy Science Letters ◽

10.1007/s40009-019-00848-4 ◽

2019 ◽

Vol 43 (3) ◽

pp. 229-232 ◽

Author(s):

T. Thamaraimanalan ◽

P. Sampath

Keyword(s):

Deep Submicron ◽

Power Reduction ◽

Leakage Power ◽

Vlsi Circuits ◽

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