ProperSYN: A portable parallel algorithm for logic synthesis

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1992.279336 ◽

1992 ◽

Author(s):

De ◽

Ramkumar ◽

Banerjee

Keyword(s):

Parallel Algorithm ◽

Logic Synthesis

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A Shared Memory Parallel Algorithm for Logic Synthesis

The Sixth International Conference on VLSI Design ◽

10.1109/icvd.1993.669703 ◽

2005 ◽

Author(s):

Chieng-Fai Lim ◽

P. Banerjee ◽

K. De ◽

S. Muroga

Keyword(s):

Parallel Algorithm ◽

Shared Memory ◽

Logic Synthesis

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A portable parallel algorithm for logic synthesis using transduction

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.277630 ◽

1994 ◽

Vol 13 (5) ◽

pp. 566-580 ◽

Author(s):

K. De ◽

B. Ramkumar ◽

P. Banerjee

Keyword(s):

Parallel Algorithm ◽

Logic Synthesis

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A Parallel Algorithm for Long Horizon Optimal Control Problems Using the Mixed Coordination Method

10.23919/acc.1989.4790483 ◽

1989 ◽

Author(s):

Jianxin Tang ◽

Peter B. Luh ◽

Tsu-Shuan Chang

Keyword(s):

Optimal Control ◽

Parallel Algorithm ◽

Optimal Control Problems ◽

Control Problems ◽

Mixed Coordination

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A parallel algorithm for optimum monitoring network design in parameter estimation of distributed systems

2013 European Control Conference (ECC) ◽

10.23919/ecc.2013.6669681 ◽

2013 ◽

Author(s):

Dariusz Ucinski ◽

Przemyslaw Baranowski

Keyword(s):

Parameter Estimation ◽

Distributed Systems ◽

Network Design ◽

Parallel Algorithm ◽

Monitoring Network ◽

Monitoring Network Design

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Quaternary reversible logic synthesis based on GF(4) Shannon expansion

Advanced Computer Control ◽

10.2495/icacc130171 ◽

2014 ◽

Author(s):

Lu Cangang ◽

Guan Zhijin ◽

He Jinfeng

Keyword(s):

Logic Synthesis ◽

Reversible Logic ◽

Reversible Logic Synthesis

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Algorithm of Optimizing Quantum Reversible Logic Synthesis

Journal of Software ◽

10.3724/sp.j.1001.2009.03407 ◽

2009 ◽

Vol 20 (9) ◽

pp. 2332-2343

Author(s):

Zhi-Qiang LI ◽

Wen-Qian LI ◽

Han-Wu CHEN

Keyword(s):

Logic Synthesis ◽

Reversible Logic ◽

Reversible Logic Synthesis

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Quantum Linear Logic Synthesis Algorithm Based on L-ESOP Reduction

Journal of Computer-Aided Design & Computer Graphics ◽

10.3724/sp.j.1089.2018.16567 ◽

2018 ◽

Vol 30 (8) ◽

pp. 1579

Author(s):

Lihua Wei ◽

Pengcheng Zhu ◽

Zhijin Guan

Keyword(s):

Linear Logic ◽

Logic Synthesis ◽

Synthesis Algorithm

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Parallel algorithm for Turbo codes

JOURNAL OF ELECTRONIC MEASUREMENT AND INSTRUMENT ◽

10.3724/sp.j.1187.2010.00638 ◽

2010 ◽

Vol 24 (7) ◽

pp. 638-642

Author(s):

Linli Cui ◽

Fan Yang ◽

Qicong Peng

Keyword(s):

Parallel Algorithm ◽

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A Parallel Algorithm for Finding a Blocking Flow in an Acyclic Network

10.21236/ada215113 ◽

1988 ◽

Author(s):

Andrew V. Goldberg ◽

Robert E. Tarjan

Keyword(s):

Parallel Algorithm ◽

Acyclic Network

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Incremental Methods for Formal Verification and Logic Synthesis

SSRN Electronic Journal ◽

10.2139/ssrn.3702088 ◽

1996 ◽

Author(s):

Gitanjali Swamy

Keyword(s):

Formal Verification ◽

Logic Synthesis ◽

Incremental Methods

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