Improved SPICE model for Phase Change Memory cell

ABSTRACTIn this work we present preliminary calculations and simulations to demonstrate feasibility of programming a nanoscale Phase Change Random Access Memory (PCRAM) cell by means of a silicon nanowire ballistic transistor (SNWBT). Memory cells based on ballistic transistors bear the advantage of having a small size and high-speed operation with low power requirements. A one-dimensional MOSFET model (FETToy) was used to estimate the output current of the nanowire as a function of its diameter. The gate oxide thickness was 1.5 nm, and the Fermi level at source was set to -0.32 eV. For the case of VDS = VGS = 1 V, when the nanowire diameter was increased from 1 to 60 nm, the output power density dropped from 109 to 106 W cm-2 , while the current increased from 20 to 90 μA. Finite element electro-thermal analysis were carried out on a segmented cylindrical phase-change memory cell made of Ge2Sb2Te5 (GST) chalcogenide, connected in series to the SNWBT. The diameter of the combined device, d, and the aspect ratio of the GST region were selected so as to achieve optimum heating of the GST. With the assumption that the bulk thermal conductivity of GST does not change significantly at the nanoscale, it was shown that for d = 24 nm, a ‘reset’ programming current of ID = 80 μA can heat the GST up to its melting point. The results presented herein can help in the design of low cost, high speed, and radiation tolerant nanoscale PCRAM devices.

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Plasmonic nanogap enhanced phase-change devices with dual electrical-optical functionality

Science Advances ◽

10.1126/sciadv.aaw2687 ◽

2019 ◽

Vol 5 (11) ◽

pp. eaaw2687 ◽

Cited By ~ 22

Author(s):

Nikolaos Farmakidis ◽

Nathan Youngblood ◽

Xuan Li ◽

James Tan ◽

Jacob L. Swett ◽

...

Keyword(s):

Phase Change ◽

Phase Change Memory ◽

Memory Cell ◽

Communications Technologies ◽

New Strategy ◽

On Chip ◽

Processing And Storage ◽

Electrical Signaling ◽

And Storage ◽

Change Memory

Modern-day computers rely on electrical signaling for the processing and storage of data, which is bandwidth-limited and power hungry. This fact has long been realized in the communications field, where optical signaling is the norm. However, exploiting optical signaling in computing will require new on-chip devices that work seamlessly in both electrical and optical domains, without the need for repeated electrical-to-optical conversion. Phase-change devices can, in principle, provide such dual electrical-optical operation, but assimilating both functionalities into a single device has so far proved elusive owing to conflicting requirements of size-limited electrical switching and diffraction-limited optical response. Here, we combine plasmonics, photonics, and electronics to deliver an integrated phase-change memory cell that can be electrically or optically switched between binary or multilevel states. Crucially, this device can also be simultaneously read out both optically and electrically, offering a new strategy for merging computing and communications technologies.

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