Efficient hardware implementation for 802.16e double binary Turbo decoder

2008 International Conference on Microelectronics ◽

10.1109/icm.2008.5393498 ◽

2008 ◽

Author(s):

Amr M. A. Hussien ◽

Hossam A. H. Fahmy ◽

Mohamed M. Khairy

Keyword(s):

Hardware Implementation ◽

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A composite sub-optimal approach for hardware implementation of turbo decoder

2013 IEEE International Conference on Communications (ICC) ◽

10.1109/icc.2013.6655279 ◽

2013 ◽

Author(s):

Vanukuru Hari Rohit ◽

Akshay Sharma ◽

Nigar Shaji

Keyword(s):

Hardware Implementation ◽

Turbo Decoder ◽

Optimal Approach

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Hardware implementation of a high-throughput 64-PPM serial concatenated turbo decoder

10.1117/12.682253 ◽

2006 ◽

Author(s):

Ryan Shoup

Keyword(s):

High Throughput ◽

Hardware Implementation ◽

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Hardware implementation of Log-MAP turbo decoder for W-CDMA Node B with CRC-aided early stopping

Vehicular Technology Conference. IEEE 55th Vehicular Technology Conference. VTC Spring 2002 (Cat. No.02CH37367) ◽

10.1109/vtc.2002.1002642 ◽

2003 ◽

Author(s):

Chunlong Bai ◽

Jun Jiang ◽

Ping Zhang

Keyword(s):

Hardware Implementation ◽

Early Stopping ◽

Turbo Decoder ◽

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Hardware implementation of Max-Log-MAP algorithm based on MacLaurin series for turbo decoder

2011 International Conference on Communications and Signal Processing ◽

10.1109/iccsp.2011.5739373 ◽

2011 ◽

Author(s):

Rahul Shrestha ◽

Roy Paily

Keyword(s):

Hardware Implementation ◽

Maclaurin Series ◽

Turbo Decoder ◽

Map Algorithm ◽

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Concurrent Algorithm and Hardware Implementation for Low-Latency Turbo Decoder Using a Single MAP Decoder

IEICE Transactions on Communications ◽

10.1587/transcom.e93.b.1 ◽

2010 ◽

Vol E93-B (1) ◽

pp. 1-8

Author(s):

Ya-Cheng LU ◽

Erl-Huei LU

Keyword(s):

Hardware Implementation ◽

Low Latency ◽

Turbo Decoder ◽

Concurrent Algorithm ◽

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A memory efficient scheme for hardware implementation of log-MAP turbo decoder

IEEE VTS 53rd Vehicular Technology Conference, Spring 2001. Proceedings (Cat. No.01CH37202) ◽

10.1109/vetecs.2001.944595 ◽

2002 ◽

Author(s):

Chunlong Bai ◽

Jun Jiang ◽

Ping Zhang

Keyword(s):

Hardware Implementation ◽

Turbo Decoder ◽

Efficient Scheme ◽

Log Map ◽

Memory Efficient

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Efficient hardware implementation of a highly-parallel 3GPP LTE/LTE-advance turbo decoder

Integration ◽

10.1016/j.vlsi.2010.07.001 ◽

2011 ◽

Vol 44 (4) ◽

pp. 305-315 ◽

Author(s):

Yang Sun ◽

Joseph R. Cavallaro

Keyword(s):

Hardware Implementation ◽

Turbo Decoder ◽

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HARDWARE IMPLEMENTATION AND EXPERIMENTAL RESEARCHES OF MAX-LOG-MAP TURBO-DECODER

Information Technology and Computer Engineering ◽

10.31649/1999-9941-2018-43-3-48-53 ◽

2018 ◽

Vol 43 (3) ◽

pp. 48-53

Author(s):

R. N. Kvyetnyy ◽

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S. G. Krivogubchenko ◽

Yu. Yu. Ivanov ◽

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...

Keyword(s):

Hardware Implementation ◽

Turbo Decoder ◽

Experimental Researches ◽

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Hardware Implementation Of Iris Matching

International Journal of Scientific Research ◽

10.15373/22778179/nov2012/16 ◽

2012 ◽

Vol 1 (6) ◽

pp. 46-48

Author(s):

Bethuna Bethuna ◽

Keyword(s):

Hardware Implementation

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An Improvement of Rate-Distortion Optimized Quantization Process and its Hardware Implementation

IEEJ Transactions on Electronics Information and Systems ◽

10.1541/ieejeiss.135.1299 ◽

2015 ◽

Vol 135 (11) ◽

pp. 1299-1306

Author(s):

Genki Moriguchi ◽

Takashi Kambe ◽

Gen Fujita ◽

Hajime Sawano

Keyword(s):

Hardware Implementation ◽

Rate Distortion

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