Design and implementation of a SHARC digital signal processor core in verflog HDL

Author(s):  
N. Mozaffar ◽  
N.Z. Azeemi
1994 ◽  
Vol 29 (3) ◽  
pp. 290-297 ◽  
Author(s):  
M. Nomura ◽  
M. Yamashina ◽  
J. Goto ◽  
T. Inoue ◽  
K. Suzuki ◽  
...  

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