A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks

2006 ◽  
Author(s):  
Jongman Kim ◽  
C. Nicopoulos ◽  
Dongkook Park
Keyword(s):  
Energy Efficient ◽  
Router Architecture ◽  
On Chip

A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks

2006 ◽  
Vol 34 (2) ◽  
pp. 4-15 ◽  
Author(s):  
Jongman Kim ◽  
Chrysostomos Nicopoulos ◽  
Dongkook Park ◽  
Vijaykrishnan Narayanan ◽  
Mazin S. Yousif ◽  
...  
Keyword(s):  
Energy Efficient ◽  
Router Architecture ◽  
On Chip

Pre-allocated Path Based Low Latency Router Architecture for Network-on-chip

2014 ◽  
Vol 35 (2) ◽  
pp. 341-346
Author(s):  
Xiao-fu Zheng ◽  
Hua-xi Gu ◽  
Yin-tang Yang ◽  
Zhong-fan Huang
Keyword(s):  
Network On Chip ◽  
Low Latency ◽  
Router Architecture ◽  
On Chip

A modular router architecture desgin for Network on Chip

2011 ◽  
Author(s):  
B Attia ◽  
W Chouchene ◽  
A Zitouni ◽  
N Abid ◽  
R Tourki
Keyword(s):  
Network On Chip ◽  
Router Architecture ◽  
On Chip

Systematic Exploration of Energy-Efficient Application-Specific Network-on-Chip Architectures

2010 ◽  
Author(s):  
Iasonas Filippopoulos ◽  
Iraklis Anagnostopoulos ◽  
Alexandros Bartzas ◽  
Dimitrios Soudris ◽  
George Economakos
Keyword(s):  
Energy Efficient ◽  
Network On Chip ◽  
Systematic Exploration ◽  
On Chip ◽  
Application Specific

Energy-efficient optical broadcast for nanophotonic networks-on-chip

2012 ◽  
Author(s):  
Cheng Li ◽  
Mark Browning ◽  
Paul V. Gratz ◽  
Samuel Palermo
Keyword(s):  
Energy Efficient ◽  
Networks On Chip ◽  
On Chip

Multi-level signaling for energy-efficient on-chip interconnects

2007 ◽  
Author(s):  
Fakhrul Zaman Rokhani ◽  
Gerald E. Sobelman
Keyword(s):  
Energy Efficient ◽  
Multi Level ◽  
On Chip
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