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409ps 4.7 FO4 64b Adder Based on Output Prediction Logic in 0.18um CMOS
IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05)
◽
10.1109/isvlsi.2005.2
◽
2005
◽
Author(s):
Sheng Sun
◽
Yi Han
◽
Xinyu Guo
◽
Kian Haur Chong
◽
L. McMurchie
◽
...
Keyword(s):
Prediction Logic
◽
Output Prediction Logic
Download Full-text
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High Speed Redundant Adder and Divider in Output Prediction Logic
IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05)
◽
10.1109/isvlsi.2005.38
◽
2005
◽
Author(s):
Xinyu Guo
◽
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Keyword(s):
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Output prediction logic: a high-performance CMOS design technique
Proceedings 2000 International Conference on Computer Design
◽
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Design High Performance Combinational Circuits Using Output Prediction Logic-OPL Technique
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Prediction Logic
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Prediction logic: A method for empirical evaluation of formal theory†
Journal of Mathematical Sociology
◽
10.1080/0022250x.1974.9989831
◽
1974
◽
Vol 3
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pp. 163-185
◽
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David K. Hildebrand
◽
James D. Laing
◽
Howard L. Rosenthal
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Empirical Evaluation
◽
Formal Theory
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Prediction Logic
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Prediction logic and quasi‐independence in empirical evaluation of formal theory
Journal of Mathematical Sociology
◽
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1974
◽
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◽
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◽
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◽
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Empirical Evaluation
◽
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Prediction Logic
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A Prediction-Logic Approach to Causal Models of Qualitative Variates
Sociological Methodology
◽
10.2307/270707
◽
1976
◽
Vol 7
◽
pp. 146
◽
Cited By ~ 1
Author(s):
David K. Hildebrand
◽
James D. Laing
◽
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Keyword(s):
Causal Models
◽
Prediction Logic
◽
Logic Approach
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